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Date:   Wed, 5 Apr 2023 19:13:17 +0530
From:   Bhupesh Sharma <bhupesh.sharma@...aro.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
        linux-kernel@...r.kernel.org, bhupesh.linux@...il.com,
        robh+dt@...nel.org
Subject: Re: [PATCH v4 1/2] dt-bindings: phy: qcom,qmp-usb: Fix phy subnode
 for SM6115 & QCM2290 USB3 PHY

On Wed, 5 Apr 2023 at 15:11, Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> On 01/04/2023 17:47, Bhupesh Sharma wrote:
> > The USB3 SS (QMP) PHY found on Qualcomm SM6115 & QCM2290 SoCs is
> > similar to sm8150 QMP PHY in the sense that the phy subnode supports
> > 6 regs, namely TX lane 1, RX lane 1, PCS, TX lane 2, RX lane 2 and
> > PCS_MISC.
> >
> > Update the dt-bindings document to reflect the same.
>
>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>
> Bhupesh,
>
> Can you use scripts/get_maintainers.pl to get the Cc addresses instead
> of writing them manually or inventing?

Sure Krzysztof, will do.

Thanks,
Bhupesh

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