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Message-ID: <b5260847-d766-dd17-99ce-0646fa2f72b2@linaro.org>
Date: Thu, 6 Apr 2023 22:42:23 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Devi Priya <quic_devipriy@...cinc.com>, agross@...nel.org,
andersson@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
jassisinghbrar@...il.com, catalin.marinas@....com, will@...nel.org,
dmitry.baryshkov@...aro.org, arnd@...db.de,
geert+renesas@...der.be, nfraprado@...labora.com,
broonie@...nel.org, rafal@...ecki.pl,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Cc: quic_srichara@...cinc.com, quic_sjaganat@...cinc.com,
quic_kathirav@...cinc.com, quic_arajkuma@...cinc.com,
quic_anusha@...cinc.com, quic_ipkumar@...cinc.com
Subject: Re: [PATCH V3 4/5] arm64: dts: qcom: ipq9574: Add support for APSS
clock controller
On 6.04.2023 08:13, Devi Priya wrote:
> Add the APCS & A73 PLL nodes to support CPU frequency scaling.
>
> Signed-off-by: Devi Priya <quic_devipriy@...cinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
> Changes in V3:
> - No change
>
> arch/arm64/boot/dts/qcom/ipq9574.dtsi | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> index 068c3950dcec..7c820463a79d 100644
> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> @@ -525,6 +525,24 @@
> timeout-sec = <30>;
> };
>
> + apcs_glb: mailbox@...1000 {
> + compatible = "qcom,ipq9574-apcs-apps-global",
> + "qcom,ipq6018-apcs-apps-global";
> + reg = <0x0b111000 0x1000>;
> + #clock-cells = <1>;
> + clocks = <&a73pll>, <&xo_board_clk>;
> + clock-names = "pll", "xo";
> + #mbox-cells = <1>;
> + };
> +
> + a73pll: clock@...6000 {
> + compatible = "qcom,ipq9574-a73pll";
> + reg = <0x0b116000 0x40>;
> + #clock-cells = <0>;
> + clocks = <&xo_board_clk>;
> + clock-names = "xo";
> + };
> +
> timer@...0000 {
> compatible = "arm,armv7-timer-mem";
> reg = <0x0b120000 0x1000>;
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