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Message-ID: <20230407203151.1.Ia16c922b77242e5832106fedc76d27f7ed4dd952@changeid>
Date: Fri, 7 Apr 2023 20:31:57 +0200
From: Patrick Delaunay <patrick.delaunay@...s.st.com>
To: Alexandre TORGUE <alexandre.torgue@...s.st.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>
CC: Patrick Delaunay <patrick.delaunay@...s.st.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>
Subject: [PATCH] ARM: dts: stm32: add part number for STM32MP15x
The STM32MP15x Device Part Number is located in the first 8 bits of OTP4,
this patch add its description as the NVMEM cell.
Signed-off-by: Patrick Delaunay <patrick.delaunay@...s.st.com>
---
arch/arm/boot/dts/stm32mp151.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 4e437d3f2ed6..3cf78f706400 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1620,6 +1620,9 @@ bsec: efuse@...05000 {
reg = <0x5c005000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
+ part_number_otp: part-number-otp@4 {
+ reg = <0x4 0x1>;
+ };
ts_cal1: calib@5c {
reg = <0x5c 0x2>;
};
--
2.25.1
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