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Message-ID: <20230411-gleaming-parasail-34e2b7c3de2e@spud>
Date: Tue, 11 Apr 2023 22:35:04 +0100
From: Conor Dooley <conor@...nel.org>
To: Hal Feng <hal.feng@...rfivetech.com>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Conor Dooley <conor.dooley@...rochip.com>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Ben Dooks <ben.dooks@...ive.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7 00/22] Basic clock, reset & device tree support for
StarFive JH7110 RISC-V SoC
On Thu, Apr 06, 2023 at 03:03:14PM +0800, Hal Feng wrote:
> On Wed, 5 Apr 2023 22:30:45 +0100, Conor Dooley wrote:
> > Hal, can you get your folks to resend whatever dts bits that are now
> > applicable? IOW, the dt-bindings for the entries are in a for-next
> > branch for some subsystem.
>
> Of course. As far as I know, these nodes include trng / pmu / mmc / qspi.
Just FYI, you can get the lads to resend them whenever, but it's too
late for v6.4 now.
Cheers,
Conor.
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