linux-kernel - Re: [PATCH 20/27] arm64: dts: mediatek: mt6795: Add tertiary PWM node

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Message-ID: <95aec24f-b393-e36d-b4dd-4c0a228fc619@gmail.com>
Date:   Wed, 12 Apr 2023 14:43:22 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
Cc:     p.zabel@...gutronix.de, airlied@...il.com, daniel@...ll.ch,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        jassisinghbrar@...il.com, chunfeng.yun@...iatek.com,
        vkoul@...nel.org, kishon@...nel.org, thierry.reding@...il.com,
        u.kleine-koenig@...gutronix.de, chunkuang.hu@...nel.org,
        ck.hu@...iatek.com, jitao.shi@...iatek.com,
        xinlei.lee@...iatek.com, houlong.wei@...iatek.com,
        dri-devel@...ts.freedesktop.org,
        linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-phy@...ts.infradead.org, linux-pwm@...r.kernel.org,
        kernel@...labora.com, phone-devel@...r.kernel.org,
        ~postmarketos/upstreaming@...ts.sr.ht
Subject: Re: [PATCH 20/27] arm64: dts: mediatek: mt6795: Add tertiary PWM node



On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
> The PWM at 0x11006000 is the tertiary PWM; unlike PWM0, PWM1, this is
> not display specific and can be used as a generic PWM controller.
> 
> This node is left disabled as usage is board-specific.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>

Applied, thanks!

> ---
>   arch/arm64/boot/dts/mediatek/mt6795.dtsi | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> index cf45cb4ad3d2..50d9276d18c6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> @@ -583,6 +583,25 @@ uart3: serial@...05000 {
>   			status = "disabled";
>   		};
>   
> +		pwm2: pwm@...06000 {
> +			compatible = "mediatek,mt6795-pwm";
> +			reg = <0 0x11006000 0 0x1000>;
> +			#pwm-cells = <2>;
> +			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
> +			clocks = <&topckgen CLK_TOP_PWM_SEL>,
> +				 <&pericfg CLK_PERI_PWM>,
> +				 <&pericfg CLK_PERI_PWM1>,
> +				 <&pericfg CLK_PERI_PWM2>,
> +				 <&pericfg CLK_PERI_PWM3>,
> +				 <&pericfg CLK_PERI_PWM4>,
> +				 <&pericfg CLK_PERI_PWM5>,
> +				 <&pericfg CLK_PERI_PWM6>,
> +				 <&pericfg CLK_PERI_PWM7>;
> +			clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
> +				      "pwm4", "pwm5", "pwm6", "pwm7";
> +			status = "disabled";
> +		};
> +
>   		i2c0: i2c@...07000 {
>   			compatible = "mediatek,mt6795-i2c", "mediatek,mt8173-i2c";
>   			reg = <0 0x11007000 0 0x70>, <0 0x11000100 0 0x80>;