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Message-ID: <CANCKTBtZt9QRkT4yAW5LsfHGf5TTL7tQ025H42+PPEi-=rWE8A@mail.gmail.com>
Date:   Wed, 12 Apr 2023 10:14:46 -0400
From:   Jim Quinlan <jim2101024@...il.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Florian Fainelli <f.fainelli@...il.com>, linux-pci@...r.kernel.org,
        Nicolas Saenz Julienne <nsaenz@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Cyril Brulebois <kibi@...ian.org>,
        Phil Elwell <phil@...pberrypi.com>,
        bcm-kernel-feedback-list@...adcom.com, james.quinlan@...adcom.com,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        "moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" 
        <linux-rpi-kernel@...ts.infradead.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/3] dt-bindings: PCI: brcmstb: Add two optional props

On Wed, Apr 12, 2023 at 7:56 AM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> On 12/04/2023 13:49, Florian Fainelli wrote:
> >
> >
> > On 4/12/2023 1:09 AM, Krzysztof Kozlowski wrote:
> >> On 11/04/2023 18:59, Jim Quinlan wrote:
> >>> Regarding "brcm,enable-l1ss":
> >>>
> >>>    The Broadcom STB/CM PCIe HW -- a core that is also used by RPi SOCs --
> >>>    requires the driver probe() to deliberately place the HW one of three
> >>>    CLKREQ# modes:
> >>>
> >>>    (a) CLKREQ# driven by the RC unconditionally
> >>>    (b) CLKREQ# driven by the EP for ASPM L0s, L1
> >>>    (c) Bidirectional CLKREQ#, as used for L1 Substates (L1SS).
> >>>
> >>>    The HW+driver can tell the difference between downstream devices that
> >>>    need (a) and (b), but does not know when to configure (c).  Further, the
> >>>    HW may cause a CPU abort on boot if guesses wrong regarding the need for
> >>>    (c).  So we introduce the boolean "brcm,enable-l1ss" property to indicate
> >>>    that (c) is desired.  Setting this property only makes sense when the
> >>>    downstream device is L1SS-capable and the OS is configured to activate
> >>>    this mode (e.g. policy==superpowersave).
> >>>
> >>>    This property is already present in the Raspian version of Linux, but the
> >>>    upstream driver implementaion that will follow adds more details and
> >>
> >> typo, implementation
> >>
> >>>    discerns between (a) and (b).
> >>>
> >>> Regarding "brcm,completion-timeout-us"
> >>>
> >>>    Our HW will cause a CPU abort if the L1SS exit time is longer than the
> >>>    PCIe transaction completion abort timeout.  We've been asked to make this
> >>>    configurable, so we are introducing "brcm,completion-timeout-us".
> >>>
> >>> Signed-off-by: Jim Quinlan <jim2101024@...il.com>
> >>
> >> What happened here? Where is the changelog?
> >
> > It is in the cover letter:
> >
> > https://lore.kernel.org/all/20230411165919.23955-1-jim2101024@gmail.com/
> >
> > but it does not look like the cover letter was copied to you or Rob.
>
> As you said, I did not get it.

Yes, sorry about that; I use a wrapper over the "cocci_cc" script and
I need to modify one or both scripts to send the cover to the
superset of recipients in the constituent commits.

Regards,
Jim Quinan
Broadcom STB
>
> Best regards,
> Krzysztof
>

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