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Message-ID: <CAPDyKFr5g3NiarFVMtjUHMvjdcKc4m-EpcKZctfgNSQpK9e_-Q@mail.gmail.com>
Date:   Mon, 17 Apr 2023 16:54:05 +0200
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Brad Larson <blarson@....com>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mmc@...r.kernel.org, linux-spi@...r.kernel.org,
        adrian.hunter@...el.com, alcooperx@...il.com,
        andy.shevchenko@...il.com, arnd@...db.de,
        brendan.higgins@...ux.dev, briannorris@...omium.org,
        brijeshkumar.singh@....com, catalin.marinas@....com,
        davidgow@...gle.com, gsomlo@...il.com, gerg@...ux-m68k.org,
        krzk@...nel.org, krzysztof.kozlowski+dt@...aro.org, lee@...nel.org,
        lee.jones@...aro.org, broonie@...nel.org,
        yamada.masahiro@...ionext.com, p.zabel@...gutronix.de,
        piotrs@...ence.com, p.yadav@...com, rdunlap@...radead.org,
        robh+dt@...nel.org, samuel@...lland.org, fancer.lancer@...il.com,
        skhan@...uxfoundation.org, suravee.suthikulpanit@....com,
        thomas.lendacky@....com, tonyhuang.sunplus@...il.com,
        vaishnav.a@...com, will@...nel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v13 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC

On Mon, 10 Apr 2023 at 20:46, Brad Larson <blarson@....com> wrote:
>
> AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
> explicitly controls byte-lane enables.
>
> Signed-off-by: Brad Larson <blarson@....com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Applied for next, thanks!

Kind regards
Uffe


> ---
>
> v12_changes:
> - Drop 'resets: false' in the amd,pensando-elba-sd4hc else properties. Passed
>   dtbs_check and dt_binding_check with both versions.
>
> v11 changes:
> - Remove resets description and reset-names
> - Add descriptions for amd,pensando-elba-sd4hc reg items
>
> v10 changes:
> - Move reset-names property definition next to existing resets prop
> - Move allOf to the bottom and set resets/reset-names required only for pensando
> - Fix reg maxItems for existing, must be 1
>
> v9 changes:
> - Add reset-names and resets properties
> - Add if/then on property amd,pensando-elba-sd4hc to set reg property
>   values for minItems and maxItems
>
> ---
>  .../devicetree/bindings/mmc/cdns,sdhci.yaml   | 27 ++++++++++++++++---
>  1 file changed, 23 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> index adacd0535c14..6c40611405a0 100644
> --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> @@ -9,19 +9,18 @@ title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
>  maintainers:
>    - Masahiro Yamada <yamada.masahiro@...ionext.com>
>
> -allOf:
> -  - $ref: mmc-controller.yaml
> -
>  properties:
>    compatible:
>      items:
>        - enum:
> +          - amd,pensando-elba-sd4hc
>            - microchip,mpfs-sd4hc
>            - socionext,uniphier-sd4hc
>        - const: cdns,sd4hc
>
>    reg:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
>
>    interrupts:
>      maxItems: 1
> @@ -120,6 +119,26 @@ required:
>    - interrupts
>    - clocks
>
> +allOf:
> +  - $ref: mmc-controller.yaml
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: amd,pensando-elba-sd4hc
> +    then:
> +      properties:
> +        reg:
> +          items:
> +            - description: Host controller registers
> +            - description: Elba byte-lane enable register for writes
> +      required:
> +        - resets
> +    else:
> +      properties:
> +        reg:
> +          maxItems: 1
> +
>  unevaluatedProperties: false
>
>  examples:
> --
> 2.17.1
>

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