linux-kernel - Re: [PATCH] counter: stm32-timer-cnt: Reset TIM_TISEL and TIM

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20230420110111.GM9904@google.com>
Date:   Thu, 20 Apr 2023 12:01:11 +0100
From:   Lee Jones <lee@...nel.org>
To:     Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>
Cc:     Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        William Breathitt Gray <william.gray@...aro.org>,
        Fabrice Gasnier <fabrice.gasnier@...s.st.com>,
        Olivier Moysan <olivier.moysan@...s.st.com>,
        Thierry Reding <thierry.reding@...il.com>,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        kernel@...gutronix.de, linux-iio@...r.kernel.org
Subject: Re: [PATCH] counter: stm32-timer-cnt: Reset TIM_TISEL and TIM_SMCR
 to their default value

On Wed, 12 Apr 2023, Uwe Kleine-König wrote:

> The driver assumes that the input selection register (TIM_TISEL) is at
> its reset default value. Usually this is the case, but the bootloader
> might have modified it. Also reset the SMCR register while at it.
> 
> This bases on the effectively same patch submitted by Olivier Moysan for
> pwm-stm32.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
> ---
> Hello,
> 
> note that the patch by Olivier Moysan[1] for pwm-stm32 is expected to
> appear in Thierry's tree soon. It added the definition of TIM_TISEL in
> the same way, so the two patches should merge just fine. Alternatively
> you can commit it to a tree that already has the pwm change (and then
> drop the change to include/linux/mfd/stm32-timers.h from this one).
> 
> Best regards
> Uwe
> 
> [1] https://lore.kernel.org/linux-pwm/20221213102707.1096345-1-olivier.moysan@foss.st.com
> 
>  drivers/counter/stm32-timer-cnt.c | 4 ++++

>  include/linux/mfd/stm32-timers.h  | 1 +

Acked-by: Lee Jones <lee@...nel.org>

>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c
> index 9bf20a5d6bda..d001d77f17ac 100644
> --- a/drivers/counter/stm32-timer-cnt.c
> +++ b/drivers/counter/stm32-timer-cnt.c
> @@ -342,6 +342,10 @@ static int stm32_timer_cnt_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, priv);
>  
> +	/* Reset input selector to its default input and disable slave mode */
> +	regmap_write(priv->regmap, TIM_TISEL, 0x0);
> +	regmap_write(priv->regmap, TIM_SMCR, 0x0);
> +
>  	/* Register Counter device */
>  	ret = devm_counter_add(dev, counter);
>  	if (ret < 0)
> diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h
> index 5f5c43fd69dd..1b94325febb3 100644
> --- a/include/linux/mfd/stm32-timers.h
> +++ b/include/linux/mfd/stm32-timers.h
> @@ -31,6 +31,7 @@
>  #define TIM_BDTR	0x44	/* Break and Dead-Time Reg */
>  #define TIM_DCR		0x48	/* DMA control register    */
>  #define TIM_DMAR	0x4C	/* DMA register for transfer */
> +#define TIM_TISEL	0x68	/* Input Selection         */
>  
>  #define TIM_CR1_CEN	BIT(0)	/* Counter Enable	   */
>  #define TIM_CR1_DIR	BIT(4)  /* Counter Direction	   */
> 
> base-commit: fe15c26ee26efa11741a7b632e9f23b01aca4cc6
> -- 
> 2.39.2
> 

-- 
Lee Jones [李琼斯]