linux-kernel - Re: [PATCH v3 2/2] dt-bindings: usb: snps,dwc3: Add 'snps,global-regs-starting-offset' quirk

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Message-ID: <CAL_JsqJBDuxCAnZmHBnHuMkjTXTLet2d3o5kLRZQ_YuqVB9Pcw@mail.gmail.com>
Date:   Fri, 21 Apr 2023 08:04:22 -0500
From:   Rob Herring <robh+dt@...nel.org>
To:     Stanley Chang <stanley_chang@...ltek.com>
Cc:     Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Felipe Balbi <balbi@...nel.org>, linux-usb@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/2] dt-bindings: usb: snps,dwc3: Add
 'snps,global-regs-starting-offset' quirk

On Fri, Apr 21, 2023 at 1:18 AM Stanley Chang <stanley_chang@...ltek.com> wrote:
>
> Add a new 'snps,global-regs-starting-offset' DT to dwc3 core to remap
> the global register start address
>
> The RTK DHC SoCs were designed the global register address offset at
> 0x8100. The default address offset is constant at DWC3_GLOBALS_REGS_START
> (0xc100). Therefore, add the property of device-tree to adjust this
> address offset.
>
> Signed-off-by: Stanley Chang <stanley_chang@...ltek.com>
> ---
>  v2 to v3 change:
> 1.  Fix the dtschema validation error.
>
>  v1 to v2 change:
> 1. Change the name of the property "snps,global-regs-starting-offset".
> 2. Adjust the format of comment.
> 3. Add initial value of the global_regs_starting_offset
> 4. Remove the log of dev_info.
> ---
>  Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> index be36956af53b..4f83fa8cb6cb 100644
> --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> @@ -359,6 +359,14 @@ properties:
>      items:
>        enum: [1, 4, 8, 16, 32, 64, 128, 256]
>
> +  snps,global-regs-starting-offset:
> +    description:
> +      value for remapping global register start address. For some dwc3
> +      controller, the dwc3 global register start address is not at
> +      default DWC3_GLOBALS_REGS_START (0xc100). This property is added to
> +      adjust the address.
> +    $ref: '/schemas/types.yaml#/definitions/uint32'

Again, we're not going to keep adding properties for every DWC3
variation. If it is board specific, then yes a property is
appropriate. If it is SoC specific, then imply it from the compatible.
Or in this case, you could possibly add another reg entry.

Rob