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Message-ID: <44e54d54-9a6d-ba49-c0db-f9de81743f64@linaro.org>
Date: Fri, 21 Apr 2023 18:30:43 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>
Cc: Rick Wertenbroek <rick.wertenbroek@...il.com>,
alberto.dassatti@...g-vd.ch, xxm@...k-chips.com,
dlemoal@...nel.org, Shawn Lin <shawn.lin@...k-chips.com>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Caleb Connolly <kc@...tmarketos.org>,
Corentin Labbe <clabbe@...libre.com>,
Brian Norris <briannorris@...omium.org>,
Johan Jonker <jbx6244@...il.com>,
Judy Hsiao <judyhsiao@...omium.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Hugh Cole-Baker <sigmaris@...il.com>,
Arnaud Ferraris <arnaud.ferraris@...labora.com>,
linux-pci@...r.kernel.org, linux-rockchip@...ts.infradead.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 06/11] dt-bindings: PCI: Update the RK3399 example to a
valid one
On 21/04/2023 11:26, Lorenzo Pieralisi wrote:
> On Wed, Apr 19, 2023 at 10:01:25PM +0200, Krzysztof Kozlowski wrote:
>> On 18/04/2023 09:46, Rick Wertenbroek wrote:
>>> Update the example in the documentation to a valid example.
>>> Address for mem-base was invalid, it pointed to address
>>> 0x8000'0000 which is the upper region of the DDR which
>>> is not necessarily populated depending on the board.
>>> This address should point to the base of the memory
>>> window region of the controller which is 0xfa00'0000.
>>> Add missing pinctrl.
>>>
>>> Signed-off-by: Rick Wertenbroek <rick.wertenbroek@...il.com>
>>> ---
>>> .../devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml | 4 +++-
>>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml
>>> index 88386a6d7011..6b62f6f58efe 100644
>>> --- a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml
>>> @@ -47,7 +47,7 @@ examples:
>>>
>>> pcie-ep@...00000 {
>>> compatible = "rockchip,rk3399-pcie-ep";
>>> - reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0x80000000 0x0 0x20000>;
>>> + reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0xfa000000 0x0 0x2000000>;
>>> reg-names = "apb-base", "mem-base";
>>> clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
>>> <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
>>> @@ -63,6 +63,8 @@ examples:
>>> phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>;
>>> phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3";
>>> rockchip,max-outbound-regions = <16>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pcie_clkreqnb_cpm>;
>>
>> This is just example of the binding, you do not need to fill all
>> unrelated (generic) properties like pinctrl.
>
> Should I merge it as-is ?
Yeah, go ahead. That was the note for the future that generic properties
are not always needed or even helpful in the example.
Best regards,
Krzysztof
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