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Message-ID: <CAFBinCDvyweC-m=nKw+FZFYvASDE2x3e-Vt=JkSzBifu87cnNw@mail.gmail.com>
Date: Sun, 23 Apr 2023 19:51:31 +0200
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: Dmitry Rokosov <ddrokosov@...rdevices.ru>
Cc: gregkh@...uxfoundation.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, neil.armstrong@...aro.org,
khilman@...libre.com, jbrunet@...libre.com,
mturquette@...libre.com, vkoul@...nel.org, kishon@...nel.org,
hminas@...opsys.com, Thinh.Nguyen@...opsys.com,
yue.wang@...ogic.com, hanjie.lin@...ogic.com,
kernel@...rdevices.ru, rockosov@...il.com,
linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-phy@...ts.infradead.org
Subject: Re: [PATCH v2 5/5] arm64: dts: meson: a1: support USB controller in
OTG mode
On Tue, Apr 18, 2023 at 1:16 PM Dmitry Rokosov <ddrokosov@...rdevices.ru> wrote:
[...]
> + usb2_phy1: phy@...0 {
> + compatible = "amlogic,a1-usb2-phy";
> + clocks = <&clkc CLKID_USB_PHY_IN>;
> + clock-names = "xtal";
Out of curiosity since there's also a CLKID_USB_PHY clock (which is
used for the dwc3 controller below):
Do we know that this part of the clock hierarchy is correct? I have no
way to check this myself, so I'm curious if you could verify this
somehow.
[...]
> + dwc2: usb@...00000 {
> + compatible = "amlogic,meson-a1-usb", "snps,dwc2";
> + reg = <0x0 0xff500000 0x0 0x40000>;
> + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&usb2_phy1>;
> + phy-names = "usb2_phy";
Documentation/devicetree/bindings/usb/dwc2.yaml only allows a
"usb2-phy" (dash instead of underscore).
[...]
> + dwc3: usb@...00000 {
> + compatible = "snps,dwc3";
> + reg = <0x0 0xff400000 0x0 0x100000>;
Note to self: interesting that Amlogic swapped the register location
of the dwc2 and dwc3 controllers since the G12 generation.
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