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Message-ID: <tef7bmjygjiafy3cykdj6uqlkovej5om2xm5rcnbjcqp34e574@hxlta64oagat>
Date: Wed, 26 Apr 2023 11:40:04 +0200
From: Andrew Jones <ajones@...tanamicro.com>
To: Heiko Stuebner <heiko@...ech.de>
Cc: palmer@...belt.com, linux-riscv@...ts.infradead.org,
paul.walmsley@...ive.com, kito.cheng@...ive.com, jrtc27@...c27.com,
conor.dooley@...rochip.com, matthias.bgg@...il.com,
heinrich.schuchardt@...onical.com, greentime.hu@...ive.com,
nick.knight@...ive.com, christoph.muellner@...ll.eu,
philipp.tomsich@...ll.eu, richard.henderson@...aro.org,
arnd@...db.de, linux-kernel@...r.kernel.org,
Heiko Stuebner <heiko.stuebner@...ll.eu>
Subject: Re: [PATCH 3/4] RISC-V: export the ISA string of the running machine
in the aux vector
On Mon, Apr 24, 2023 at 09:49:10PM +0200, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@...ll.eu>
>
> Already defined aux-vectors regarding the machine type are AT_PLATFORM
> and AT_BASE_PLATFORM. PPC already uses AT_BASE_PLATFORM to identify the
> real platform the system is running on, so do a similar thing on RISC-V
> and export the ISA string of the running machine via this aux-vector
> element.
>
> This way userspace can possibly adapt to extensions that allow it to
> run certain loads more performantly.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
> ---
> arch/riscv/include/asm/elf.h | 10 ++++++++++
> arch/riscv/kernel/cpu.c | 12 ++++++++++++
> 2 files changed, 22 insertions(+)
>
> diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
> index 30e7d2455960..820ef627e83d 100644
> --- a/arch/riscv/include/asm/elf.h
> +++ b/arch/riscv/include/asm/elf.h
> @@ -78,6 +78,16 @@ extern unsigned long elf_hwcap;
>
> #define COMPAT_ELF_PLATFORM (NULL)
>
> +/*
> + * ELF_PLATFORM indicates the ISA supported by the platform, but has
> + * special meaning to ld.so .
^ stray space
> + * Expose the ISA string including all usable extensions via
> + * ELF_BASE_PLATFORM instead and allow userspace to adapt to them
> + * if needed.
> + */
> +#define ELF_BASE_PLATFORM (riscv_base_platform)
> +extern const char *riscv_base_platform;
> +
> #ifdef CONFIG_MMU
> #define ARCH_DLINFO \
> do { \
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 06c2f587a176..71770563199f 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -118,8 +118,12 @@ static int riscv_cpuinfo_starting(unsigned int cpu)
> return 0;
> }
>
> +const char *riscv_base_platform = NULL;
No need for the '= NULL'
> +static char *riscv_create_isa_string(void);
> +
> static int __init riscv_cpuinfo_init(void)
> {
> + char *isa_str;
> int ret;
>
> ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "riscv/cpuinfo:starting",
> @@ -129,6 +133,14 @@ static int __init riscv_cpuinfo_init(void)
> return ret;
> }
>
> + /*
> + * Create the isa-string with the common set of extensions over
> + * all harts, to expose as AT_BASE_PLATFORM in the aux vector.
> + */
> + isa_str = riscv_create_isa_string();
> + if (!IS_ERR(isa_str))
> + riscv_base_platform = isa_str;
> +
> return 0;
> }
> arch_initcall(riscv_cpuinfo_init);
> --
> 2.39.0
>
Otherwise,
Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
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