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Message-ID: <20230429-exclusion-specimen-f47b03c6d859@spud>
Date:   Sat, 29 Apr 2023 10:50:50 +0100
From:   Conor Dooley <conor@...nel.org>
To:     Randy Dunlap <rdunlap@...radead.org>
Cc:     linux-kernel@...r.kernel.org, Heiko Stuebner <heiko@...ech.de>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org, Evan Green <evan@...osinc.com>
Subject: Re: [PATCH] riscv: fix sifive and thead section mismatches in errata

On Fri, Apr 28, 2023 at 09:35:30PM -0700, Randy Dunlap wrote:
> When CONFIG_MODULES is set, __init_or_module becomes <empty>, but when
> CONFIG_MODULES is not set, __init_or_module becomes __init.
> In the latter case, it causes section mismatch warnings:
> 
> WARNING: modpost: vmlinux.o: section mismatch in reference: riscv_fill_cpu_mfr_info (section: .text) -> sifive_errata_patch_func (section: .init.text)
> WARNING: modpost: vmlinux.o: section mismatch in reference: riscv_fill_cpu_mfr_info (section: .text) -> thead_errata_patch_func (section: .init.text)
> 
> It appears that CONFIG_MODULES not set is not tested very much.

I dunno if it the testing is *that* rare, because I'm not sure that the
fixes tags below are correct. I think that it is actually:
Fixes: bb3f89487fd9 ("RISC-V: hwprobe: Remove __init on probe_vendor_features()")
That was only applied on 20/04.

Cheers,
Conor.

> Fixes: a8e910168bba ("riscv: implement module alternatives")
> Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> Signed-off-by: Randy Dunlap <rdunlap@...radead.org>
> Cc: Heiko Stuebner <heiko@...ech.de>
> Cc: Paul Walmsley <paul.walmsley@...ive.com>
> Cc: Palmer Dabbelt <palmer@...belt.com>
> Cc: Albert Ou <aou@...s.berkeley.edu>
> Cc: linux-riscv@...ts.infradead.org
> ---
>  arch/riscv/errata/sifive/errata.c |    8 +++-----
>  arch/riscv/errata/thead/errata.c  |    6 +++---
>  2 files changed, 6 insertions(+), 8 deletions(-)
> 
> diff -- a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c
> --- a/arch/riscv/errata/sifive/errata.c
> +++ b/arch/riscv/errata/sifive/errata.c
> @@ -82,11 +82,9 @@ static void __init_or_module warn_miss_e
>  	pr_warn("----------------------------------------------------------------\n");
>  }
>  
> -void __init_or_module sifive_errata_patch_func(struct alt_entry *begin,
> -					       struct alt_entry *end,
> -					       unsigned long archid,
> -					       unsigned long impid,
> -					       unsigned int stage)
> +void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
> +			      unsigned long archid, unsigned long impid,
> +			      unsigned int stage)
>  {
>  	struct alt_entry *alt;
>  	u32 cpu_req_errata;
> diff -- a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
> --- a/arch/riscv/errata/thead/errata.c
> +++ b/arch/riscv/errata/thead/errata.c
> @@ -83,9 +83,9 @@ static u32 thead_errata_probe(unsigned i
>  	return cpu_req_errata;
>  }
>  
> -void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
> -					      unsigned long archid, unsigned long impid,
> -					      unsigned int stage)
> +void thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
> +			     unsigned long archid, unsigned long impid,
> +			     unsigned int stage)
>  {
>  	struct alt_entry *alt;
>  	u32 cpu_req_errata = thead_errata_probe(stage, archid, impid);

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