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Message-ID: <DM4PR12MB53109312920C5C666507F12B8A6D9@DM4PR12MB5310.namprd12.prod.outlook.com>
Date: Thu, 4 May 2023 06:18:11 +0000
From: "Vyas, Devang nayanbhai" <Devangnayanbhai.Vyas@....com>
To: Andrew Lunn <andrew@...n.ch>
CC: "hkallweit1@...il.com" <hkallweit1@...il.com>,
"linux@...linux.org.uk" <linux@...linux.org.uk>,
"davem@...emloft.net" <davem@...emloft.net>,
"edumazet@...gle.com" <edumazet@...gle.com>,
"pabeni@...hat.com" <pabeni@...hat.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Jakub Kicinski <kuba@...nel.org>
Subject: RE: [PATCH] net: phy: aquantia: Add 10mbps support
[AMD Official Use Only - General]
Hi Andrew,
We are using AQR113C Marvell PHY which is CL45 based and based on below check in phy_probe() function:
if (phydrv->features)
linkmode_copy(phydev->supported, phydrv->features);
else if (phydrv->get_features)
err = phydrv->get_features(phydev);
else if (phydev->is_c45)
err = genphy_c45_pma_read_abilities(phydev); -> it reads capability from PMA register where 10M bit is read-only static and value is 0
else
err = genphy_read_abilities(phydev);
Based on PHY datasheet, it supports 10M and we have made the change for the same and verified successfully.
Below code should set the supported field under genphy_c45_pma_read_abilities(), but as the value is 0, we have to set the 10M mode explicitly.
linkmode_mod_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
phydev->supported,
val & MDIO_PMA_EXTABLE_10BT);
Please share your inputs further.
Thanks & Regards,
Devang Vyas
-----Original Message-----
From: Jakub Kicinski <kuba@...nel.org>
Sent: Wednesday, May 3, 2023 8:17 AM
To: Vyas, Devang nayanbhai <Devangnayanbhai.Vyas@....com>
Cc: Andrew Lunn <andrew@...n.ch>; hkallweit1@...il.com; linux@...linux.org.uk; davem@...emloft.net; edumazet@...gle.com; pabeni@...hat.com; netdev@...r.kernel.org; linux-kernel@...r.kernel.org
Subject: Re: [PATCH] net: phy: aquantia: Add 10mbps support
On Wed, 26 Apr 2023 14:54:01 +0200 Andrew Lunn wrote:
> On Wed, Apr 26, 2023 at 01:46:12PM +0530, Devang Vyas wrote:
> > This adds support for 10mbps speed in PHY device's "supported" field
> > which helps in autonegotiating 10mbps link from PHY side where PHY
> > supports the speed but not updated in PHY kernel framework.
>
> Are you saying it is not listed in BMSR that the PHY supports 10 Mbps?
> Bits BMSR_10HALF and BMSR_10FULL are not set?
I didn't see any reply to Andrew's question so dropping this from patchwork for now. It feels like -next material too, so please hold off any reposting until Monday.
--
pw-bot: defer
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