linux-kernel - Re: [PATCH v4 06/15] dmaengine: idxd: Add wq private data accessors

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Message-ID: <5c2f8cd03b03627ca726ca2782887e501827ea7b.camel@linux.intel.com>
Date:   Mon, 08 May 2023 15:55:55 -0500
From:   Tom Zanussi <tom.zanussi@...ux.intel.com>
To:     Dave Jiang <dave.jiang@...el.com>, herbert@...dor.apana.org.au,
        davem@...emloft.net, fenghua.yu@...el.com, vkoul@...nel.org
Cc:     tony.luck@...el.com, wajdi.k.feghali@...el.com,
        james.guilford@...el.com, kanchana.p.sridhar@...el.com,
        giovanni.cabiddu@...el.com, linux-kernel@...r.kernel.org,
        linux-crypto@...r.kernel.org, dmaengine@...r.kernel.org
Subject: Re: [PATCH v4 06/15] dmaengine: idxd: Add wq private data accessors

On Mon, 2023-05-08 at 13:43 -0700, Dave Jiang wrote:
> 
> 
> On 5/8/23 1:07 PM, Tom Zanussi wrote:
> > Add the accessors set_idxd_wq_private() and idxd_wq_private()
> > allowing
> > users to set and retrieve a private void * associated with an
> > idxd_wq.
> > 
> > The private data is stored in the idxd_dev.conf_dev associated with
> > each idxd_wq.
> > 
> > Signed-off-by: Tom Zanussi <tom.zanussi@...ux.intel.com>
> > ---
> >   drivers/dma/idxd/idxd.h | 10 ++++++++++
> >   1 file changed, 10 insertions(+)
> > 
> > diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
> > index 193552dea224..71cd4ca7d27a 100644
> > --- a/drivers/dma/idxd/idxd.h
> > +++ b/drivers/dma/idxd/idxd.h
> > @@ -552,6 +552,16 @@ static inline int idxd_wq_refcount(struct
> > idxd_wq *wq)
> >         return wq->client_count;
> >   };
> >   
> > +static inline void set_idxd_wq_private(struct idxd_wq *wq, void
> > *private)
> 
> I would go with the same kernel naming convention:
> 
> idxd_wq_set_private() and idxd_wq_get_private()?


Yeah, makes sense, will change.

Thanks,

Tom

> > +{
> > +       dev_set_drvdata(wq_confdev(wq), private);
> > +}
> > +
> > +static inline void *idxd_wq_private(struct idxd_wq *wq)
> > +{
> > +       return dev_get_drvdata(wq_confdev(wq));
> > +}
> > +
> >   /*
> >    * Intel IAA does not support batch processing.
> >    * The max batch size of device, max batch size of wq and