linux-kernel - Re: [PATCH 1/5] irqchip/sifive-plic: Support T-HEAD's C910 PLIC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <ZFkewiBpnxCigI0G@xhacker>
Date:   Tue, 9 May 2023 00:09:38 +0800
From:   Jisheng Zhang <jszhang@...nel.org>
To:     Guo Ren <guoren@...nel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 1/5] irqchip/sifive-plic: Support T-HEAD's C910 PLIC

On Mon, May 08, 2023 at 02:52:29PM +0800, Guo Ren wrote:
> On Mon, May 8, 2023 at 2:34 AM Jisheng Zhang <jszhang@...nel.org> wrote:
> >
> > The T-HEAD's C910 PLIC still needs the delegation bit settingto allow
> > access from S-mode, but it doesn't need the edge quirk.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> > ---
> >  .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml      | 4 ++++
> >  drivers/irqchip/irq-sifive-plic.c                             | 1 +
> >  2 files changed, 5 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > index f75736a061af..64b43a3c3748 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > @@ -62,6 +62,10 @@ properties:
> >                - starfive,jh7110-plic
> >                - canaan,k210-plic
> >            - const: sifive,plic-1.0.0
> > +      - items:
> > +          - enum:
> > +              - thead,light-plic
> > +          - const: thead,c910-plic
> >        - items:
> >            - enum:
> >                - allwinner,sun20i-d1-plic
> > diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> > index e1484905b7bd..71afa2a584d9 100644
> > --- a/drivers/irqchip/irq-sifive-plic.c
> > +++ b/drivers/irqchip/irq-sifive-plic.c
> > @@ -569,6 +569,7 @@ static int __init plic_init(struct device_node *node,
> >  }
> >
> >  IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
> > +IRQCHIP_DECLARE(thead_c910_plic, "thead,c910-plic", plic_init);
> >  IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
> >
> >  static int __init plic_edge_init(struct device_node *node,
> > --
> > 2.40.0
> >
> opensbi needs thead,c900-plic, and we could put multi compatible name
> in the dts. So, it's no need here.

Thanks, I misunderstood the PLIC edge quirk. This patch isn't needed any
more.