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Message-ID: <ZFkgsHGvEIxGDxXv@xhacker>
Date:   Tue, 9 May 2023 00:17:52 +0800
From:   Jisheng Zhang <jszhang@...nel.org>
To:     Conor Dooley <conor@...nel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org, Guo Ren <guoren@...nel.org>
Subject: Re: [PATCH 5/5] MAINTAINERS: add entry for T-HEAD RISC-V SoC

On Sun, May 07, 2023 at 10:21:26PM +0100, Conor Dooley wrote:
> Hey Jisheng,

Hi Conor,

> 
> On Mon, May 08, 2023 at 02:23:04AM +0800, Jisheng Zhang wrote:
> > I would like to temporarily maintain the T-HEAD RISC-V SoC support.
> 
> What does "temporarily" mean?

I got a Lichee Pi 4A board, and want to mainline its support. Sending
the new dts patches needs to touch MAINTAINERS entry, so I added it.
But I expected an experienced people from T-HEAD, with many
kernel contribuitions in the past, will take the maintainership
finally, for example, Ren Guo. He knew this SoC better than me.

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