[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ca1e1df877652808ef76851d7f2ed781.sboyd@kernel.org>
Date: Wed, 10 May 2023 14:20:28 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Runyang Chen <runyang.chen@...iatek.com>
Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
Runyang Chen <runyang.chen@...iatek.com>
Subject: Re: [PATCH v2 2/2] clk: mediatek: reset: add infra_ao reset support for MT8188
Quoting Runyang Chen (2023-05-05 06:13:08)
> @@ -176,9 +177,32 @@ static const struct mtk_gate infra_ao_clks[] = {
> "infra_ao_aes_msdcfde_0p", "top_aes_msdcfde", 18),
> };
>
> +static u16 infra_ao_rst_ofs[] = {
const?
> + INFRA_RST0_SET_OFFSET,
> + INFRA_RST1_SET_OFFSET,
> + INFRA_RST2_SET_OFFSET,
> + INFRA_RST3_SET_OFFSET,
> + INFRA_RST4_SET_OFFSET,
> +};
> +
> +static u16 infra_ao_idx_map[] = {
const?
> + [MT8188_INFRA_RST1_THERMAL_MCU_RST] = 1 * RST_NR_PER_BANK + 2,
> + [MT8188_INFRA_RST1_THERMAL_CTRL_RST] = 1 * RST_NR_PER_BANK + 4,
> + [MT8188_INFRA_RST3_PTP_CTRL_RST] = 3 * RST_NR_PER_BANK + 5,
> +};
> +
> +static struct mtk_clk_rst_desc infra_ao_rst_desc = {
> + .version = MTK_RST_SET_CLR,
> + .rst_bank_ofs = infra_ao_rst_ofs,
> + .rst_bank_nr = ARRAY_SIZE(infra_ao_rst_ofs),
> + .rst_idx_map = infra_ao_idx_map,
> + .rst_idx_map_nr = ARRAY_SIZE(infra_ao_idx_map),
> +};
> +
> static const struct mtk_clk_desc infra_ao_desc = {
> .clks = infra_ao_clks,
> .num_clks = ARRAY_SIZE(infra_ao_clks),
> + .rst_desc = &infra_ao_rst_desc,
> };
Powered by blists - more mailing lists