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Message-ID: <99f2b9a431d0f22f9144dad4732056f311d19f61.camel@mediatek.com>
Date:   Thu, 25 May 2023 06:46:25 +0000
From:   Runyang Chen (陈润洋) 
        <Runyang.Chen@...iatek.com>
To:     "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 2/2] clk: mediatek: reset: add infra_ao reset support
 for MT8188

On Wed, 2023-05-10 at 14:20 -0700, Stephen Boyd wrote:
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 
> 
> Quoting Runyang Chen (2023-05-05 06:13:08)
> > @@ -176,9 +177,32 @@ static const struct mtk_gate infra_ao_clks[] =
> > {
> >                        "infra_ao_aes_msdcfde_0p",
> > "top_aes_msdcfde", 18),
> >  };
> > 
> > +static u16 infra_ao_rst_ofs[] = {
> 
> const?

The infra_ao_rst_ofs and infra_ao_idx_map will be modified by the reset
controller driver, so it could not be constified. And previous code did
not set it as const.
> 
> > +       INFRA_RST0_SET_OFFSET,
> > +       INFRA_RST1_SET_OFFSET,
> > +       INFRA_RST2_SET_OFFSET,
> > +       INFRA_RST3_SET_OFFSET,
> > +       INFRA_RST4_SET_OFFSET,
> > +};
> > +
> > +static u16 infra_ao_idx_map[] = {
> 
> const?
> 
> > +       [MT8188_INFRA_RST1_THERMAL_MCU_RST] = 1 * RST_NR_PER_BANK +
> > 2,
> > +       [MT8188_INFRA_RST1_THERMAL_CTRL_RST] = 1 * RST_NR_PER_BANK
> > + 4,
> > +       [MT8188_INFRA_RST3_PTP_CTRL_RST] = 3 * RST_NR_PER_BANK + 5,
> > +};
> > +
> > +static struct mtk_clk_rst_desc infra_ao_rst_desc = {

infra_ao_rst_desc will be constified at V4.

> > +       .version = MTK_RST_SET_CLR,
> > +       .rst_bank_ofs = infra_ao_rst_ofs,
> > +       .rst_bank_nr = ARRAY_SIZE(infra_ao_rst_ofs),
> > +       .rst_idx_map = infra_ao_idx_map,
> > +       .rst_idx_map_nr = ARRAY_SIZE(infra_ao_idx_map),
> > +};
> > +
> >  static const struct mtk_clk_desc infra_ao_desc = {
> >         .clks = infra_ao_clks,
> >         .num_clks = ARRAY_SIZE(infra_ao_clks),
> > +       .rst_desc = &infra_ao_rst_desc,
> >  };

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