linux-kernel - Re: [PATCH 07/23] arm64: zynqmp: Add pmu interrupt-affinity

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Message-ID: <20230510070015.GF11711@pendragon.ideasonboard.com>
Date:   Wed, 10 May 2023 10:00:15 +0300
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     Michal Simek <michal.simek@....com>
Cc:     linux-kernel@...r.kernel.org, monstr@...str.eu,
        michal.simek@...inx.com, git@...inx.com,
        Radhey Shyam Pandey <radhey.shyam.pandey@....com>,
        Harini Katakam <harini.katakam@....com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Parth Gajjar <parth.gajjar@....com>,
        Piyush Mehta <piyush.mehta@...inx.com>,
        Rob Herring <robh+dt@...nel.org>,
        Robert Hancock <robert.hancock@...ian.com>,
        Tanmay Shah <tanmay.shah@....com>,
        Vishal Sagar <vishal.sagar@....com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 07/23] arm64: zynqmp: Add pmu interrupt-affinity

Hi Michal,

Thank you for the patch.

On Tue, May 02, 2023 at 03:35:35PM +0200, Michal Simek wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
> 
> Explicitly specify interrupt affinity to avoid HW perfevents
> need to guess. This avoids the following error upon linux boot:
> armv8-pmu pmu: hw perfevents: no interrupt-affinity property,
> guessing.

As mentioned for some of the previous patches, the commit message should
explain why this change improves the DT system description. The fact
that it gets rid of a warning message may be mentioned, but it shouldn't
be the main focus.

> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
> Signed-off-by: Michal Simek <michal.simek@....com>
> ---
> 
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 61c7045eb992..a117294dc890 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -161,6 +161,10 @@ pmu {
>  			     <0 144 4>,
>  			     <0 145 4>,
>  			     <0 146 4>;
> +		interrupt-affinity = <&cpu0>,
> +				     <&cpu1>,
> +				     <&cpu2>,
> +				     <&cpu3>;
>  	};
>  
>  	psci {

-- 
Regards,

Laurent Pinchart