linux-kernel - Re: [PATCH 08/23] arm64: zynqmp: Add resets property to sdhci nodes

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Message-ID: <20230510070234.GG11711@pendragon.ideasonboard.com>
Date:   Wed, 10 May 2023 10:02:34 +0300
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     Michal Simek <michal.simek@....com>
Cc:     linux-kernel@...r.kernel.org, monstr@...str.eu,
        michal.simek@...inx.com, git@...inx.com,
        Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@...inx.com>,
        Harini Katakam <harini.katakam@....com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Michael Grzeschik <m.grzeschik@...gutronix.de>,
        Piyush Mehta <piyush.mehta@...inx.com>,
        Radhey Shyam Pandey <radhey.shyam.pandey@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Robert Hancock <robert.hancock@...ian.com>,
        Tanmay Shah <tanmay.shah@....com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 08/23] arm64: zynqmp: Add resets property to sdhci nodes

Hi Michal,

Thank you for the patch.

On Tue, May 02, 2023 at 03:35:36PM +0200, Michal Simek wrote:
> From: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@...inx.com>
> 
> Add "resets" property to sdhci nodes. Resets property is used to reset the
> SD host controller when dynamic configuration support is enabled.
> 
> Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@...inx.com>
> Signed-off-by: Michal Simek <michal.simek@....com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>

> ---
> 
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index a117294dc890..7bd3e816226a 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -755,6 +755,7 @@ sdhci0: mmc@...60000 {
>  			#clock-cells = <1>;
>  			clock-output-names = "clk_out_sd0", "clk_in_sd0";
>  			power-domains = <&zynqmp_firmware PD_SD_0>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_SDIO0>;
>  		};
>  
>  		sdhci1: mmc@...70000 {
> @@ -768,6 +769,7 @@ sdhci1: mmc@...70000 {
>  			#clock-cells = <1>;
>  			clock-output-names = "clk_out_sd1", "clk_in_sd1";
>  			power-domains = <&zynqmp_firmware PD_SD_1>;
> +			resets = <&zynqmp_reset ZYNQMP_RESET_SDIO1>;
>  		};
>  
>  		smmu: iommu@...00000 {

-- 
Regards,

Laurent Pinchart