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Message-ID: <60676636bdbeb50e80c02ff24f5b58681689dfba.camel@microchip.com>
Date: Thu, 11 May 2023 09:53:36 +0200
From: Steen Hegelund <steen.hegelund@...rochip.com>
To: Alexander Couzens <lynxis@...0.eu>, <netdev@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
"Jakub Kicinski" <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
Subject: Re: [PATCH net-next 1/8] net: phy: realtek: rtl8221: allow to
configure SERDES mode
Hi Alexander,
On Thu, 2023-05-11 at 00:53 +0200, Alexander Couzens wrote:
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>
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>
> The rtl8221 supports multiple SERDES modes:
> - SGMII
> - 2500base-x
> - HiSGMII
>
> Further it supports rate adaption on SERDES links to allow
> slow ethernet speeds (10/100/1000mbit) to work on 2500base-x/HiSGMII
> links without reducing the SERDES speed.
>
> When operating without rate adapters the SERDES link will follow the
> ethernet speed.
>
> Signed-off-by: Alexander Couzens <lynxis@...0.eu>
> ---
> drivers/net/phy/realtek.c | 55 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
> index 3d99fd6664d7..a7dd5a075135 100644
> --- a/drivers/net/phy/realtek.c
> +++ b/drivers/net/phy/realtek.c
> @@ -53,6 +53,15 @@
> RTL8201F_ISR_LINK)
> #define RTL8201F_IER 0x13
>
> +#define RTL8221B_MMD_SERDES_CTRL MDIO_MMD_VEND1
> +#define RTL8221B_MMD_PHY_CTRL MDIO_MMD_VEND2
> +#define RTL8221B_SERDES_OPTION 0x697a
> +#define RTL8221B_SERDES_OPTION_MODE_MASK GENMASK(5, 0)
> +#define RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII 0
> +#define RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII 1
> +#define RTL8221B_SERDES_OPTION_MODE_2500BASEX 2
> +#define RTL8221B_SERDES_OPTION_MODE_HISGMII 3
> +
> #define RTL8366RB_POWER_SAVE 0x15
> #define RTL8366RB_POWER_SAVE_ON BIT(12)
>
> @@ -849,6 +858,48 @@ static irqreturn_t rtl9000a_handle_interrupt(struct
> phy_device *phydev)
> return IRQ_HANDLED;
> }
>
> +static int rtl8221b_config_init(struct phy_device *phydev)
> +{
> + u16 option_mode;
> +
> + switch (phydev->interface) {
> + case PHY_INTERFACE_MODE_2500BASEX:
> + if (!phydev->is_c45) {
> + option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX;
> + break;
> + }
> + fallthrough;
> + case PHY_INTERFACE_MODE_SGMII:
> + option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII;
> + break;
> + default:
> + return 0;
> + }
> +
> + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL,
> + 0x75f3, 0);
Please provide a symbol for the magic value.
> +
> + phy_modify_mmd_changed(phydev, RTL8221B_MMD_SERDES_CTRL,
> + RTL8221B_SERDES_OPTION,
> + RTL8221B_SERDES_OPTION_MODE_MASK, option_mode);
> + switch (option_mode) {
> + case RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII:
> + case RTL8221B_SERDES_OPTION_MODE_2500BASEX:
This next section also uses a number of magic values. Please convert to
symbols.
> + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04,
> 0x0503);
> + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10,
> 0xd455);
> + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11,
> 0x8020);
> + break;
> + case RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII:
> + case RTL8221B_SERDES_OPTION_MODE_HISGMII:
> + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04,
> 0x0503);
> + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10,
> 0xd433);
> + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11,
> 0x8020);
> + break;
> + }
> +
> + return 0;
> +}
> +
> static struct phy_driver realtek_drvs[] = {
> {
> PHY_ID_MATCH_EXACT(0x00008201),
> @@ -970,6 +1021,7 @@ static struct phy_driver realtek_drvs[] = {
> .name = "RTL8226B_RTL8221B 2.5Gbps PHY",
> .get_features = rtl822x_get_features,
> .config_aneg = rtl822x_config_aneg,
> + .config_init = rtl8221b_config_init,
> .read_status = rtl822x_read_status,
> .suspend = genphy_suspend,
> .resume = rtlgen_resume,
> @@ -992,6 +1044,7 @@ static struct phy_driver realtek_drvs[] = {
> .name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
> .get_features = rtl822x_get_features,
> .config_aneg = rtl822x_config_aneg,
> + .config_init = rtl8221b_config_init,
> .read_status = rtl822x_read_status,
> .suspend = genphy_suspend,
> .resume = rtlgen_resume,
> @@ -1002,6 +1055,7 @@ static struct phy_driver realtek_drvs[] = {
> .name = "RTL8221B-VB-CG 2.5Gbps PHY",
> .get_features = rtl822x_get_features,
> .config_aneg = rtl822x_config_aneg,
> + .config_init = rtl8221b_config_init,
> .read_status = rtl822x_read_status,
> .suspend = genphy_suspend,
> .resume = rtlgen_resume,
> @@ -1012,6 +1066,7 @@ static struct phy_driver realtek_drvs[] = {
> .name = "RTL8221B-VM-CG 2.5Gbps PHY",
> .get_features = rtl822x_get_features,
> .config_aneg = rtl822x_config_aneg,
> + .config_init = rtl8221b_config_init,
> .read_status = rtl822x_read_status,
> .suspend = genphy_suspend,
> .resume = rtlgen_resume,
> --
> 2.40.0
>
>
Otherwise
Reviewed-by: Steen Hegelund <Steen.Hegelund@...rochip.com>
Best Regards
Steen
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