linux-kernel - Re: [PATCH v10 0/4] dmaengine: dw-edma: Add support for native HDMA

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Message-ID: <ZGezgLc63PsqfWBs@matsya>
Date:   Fri, 19 May 2023 23:06:00 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Cai Huoqing <cai.huoqing@...ux.dev>
Cc:     Serge Semin <fancer.lancer@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Jingoo Han <jingoohan1@...il.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Rob Herring <robh@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org,
        linux-pci@...r.kernel.org
Subject: Re: [PATCH v10 0/4] dmaengine: dw-edma: Add support for native HDMA

On 19-05-23, 21:39, Cai Huoqing wrote:
> On 19 5月 23 16:57:06, Vinod Koul wrote:
> > On 17-05-23, 11:01, Cai Huoqing wrote:
> > > Add support for HDMA NATIVE, as long the IP design has set
> > > the compatible register map parameter-HDMA_NATIVE,
> > > which allows compatibility for native HDMA register configuration.
> > > 
> > > The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP.
> > > And the native HDMA registers are different from eDMA,
> > > so this patch add support for HDMA NATIVE mode.
> > > 
> > > HDMA write and read channels operate independently to maximize
> > > the performance of the HDMA read and write data transfer over
> > > the link When you configure the HDMA with multiple read channels,
> > > then it uses a round robin (RR) arbitration scheme to select
> > > the next read channel to be serviced.The same applies when
> > > youhave multiple write channels.
> > > 
> > > The native HDMA driver also supports a maximum of 16 independent
> > > channels (8 write + 8 read), which can run simultaneously.
> > > Both SAR (Source Address Register) and DAR (Destination Address Register)
> > > are aligned to byte.
> > > 
> > > Cai Huoqing (1):
> > >   dmaengine: dw-edma: Add support for native HDMA
> > > 
> > > Cai huoqing (3):
> > >   dmaengine: dw-edma: Rename dw_edma_core_ops structure to
> > >     dw_edma_plat_ops
> > >   dmaengine: dw-edma: Create a new dw_edma_core_ops structure to
> > >     abstract controller operation
> > >   dmaengine: dw-edma: Add HDMA DebugFS support
> > 
> > You should have a single name for all these patches :-(
> 
> Hi Vinod,
> 
> Thanks for your reply.
> 
> Do you mean patch[0/4] and patch[3/4] shouldn't have the same name?

It should be Cai Huoqing or Cai huoqing not both :-)

> 
> Thanks,
> Cai-
> > 
> > > 
> > > Tested-by: Serge Semin <fancer.lancer@...il.com>
> > > 
> > > v9->v10:
> > >   1.Update commit log.
> > >   2.rebase for dma-next
> > > 
> > > v9 link:
> > >   https://lore.kernel.org/lkml/20230413033156.93751-1-cai.huoqing@linux.dev/
> > > 
> > >  drivers/dma/dw-edma/Makefile                 |   8 +-
> > >  drivers/dma/dw-edma/dw-edma-core.c           |  86 ++----
> > >  drivers/dma/dw-edma/dw-edma-core.h           |  58 ++++
> > >  drivers/dma/dw-edma/dw-edma-pcie.c           |   4 +-
> > >  drivers/dma/dw-edma/dw-edma-v0-core.c        |  85 +++++-
> > >  drivers/dma/dw-edma/dw-edma-v0-core.h        |  14 +-
> > >  drivers/dma/dw-edma/dw-hdma-v0-core.c        | 296 +++++++++++++++++++
> > >  drivers/dma/dw-edma/dw-hdma-v0-core.h        |  17 ++
> > >  drivers/dma/dw-edma/dw-hdma-v0-debugfs.c     | 170 +++++++++++
> > >  drivers/dma/dw-edma/dw-hdma-v0-debugfs.h     |  22 ++
> > >  drivers/dma/dw-edma/dw-hdma-v0-regs.h        | 129 ++++++++
> > >  drivers/pci/controller/dwc/pcie-designware.c |   2 +-
> > >  include/linux/dma/edma.h                     |   7 +-
> > >  13 files changed, 807 insertions(+), 91 deletions(-)
> > >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.c
> > >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.h
> > >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c
> > >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h
> > >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-regs.h
> > > 
> > > -- 
> > > 2.34.1
> > 
> > -- 
> > ~Vinod

-- 
~Vinod