linux-kernel - Re: [PATCH 1/3] MIPS: Introduce WAR_4KC

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Message-ID: <alpine.DEB.2.21.2305192117230.50034@angie.orcam.me.uk>
Date:   Fri, 19 May 2023 21:23:10 +0100 (BST)
From:   "Maciej W. Rozycki" <macro@...am.me.uk>
To:     Jiaxun Yang <jiaxun.yang@...goat.com>
cc:     linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Subject: Re: [PATCH 1/3] MIPS: Introduce WAR_4KC_LLSC config option

On Fri, 19 May 2023, Jiaxun Yang wrote:

> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index 6d15a398d389..fd452e68cd90 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -152,6 +152,13 @@ static inline void check_errata(void)
>  	struct cpuinfo_mips *c = &current_cpu_data;
>  
>  	switch (current_cpu_type()) {
> +	case CPU_4KC:
> +		if ((c->processor_id & PRID_REV_MASK) < PRID_REV_4KC_V1_0) {
> +			c->options &= ~MIPS_CPU_LLSC;
> +			if (!IS_ENABLED(CONFIG_WAR_4K_LLSC))
> +				pr_err("CPU have LLSC errata, please enable CONFIG_WAR_4K_LLSC");

 Given the circumstances I think this should be `panic'.  You don't want 
to continue with a system that can randomly lock up.

 Also "CPU has LLSC erratum, [...]" as both are singular.

  Maciej