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Message-ID: <alpine.DEB.2.21.2305192125360.50034@angie.orcam.me.uk>
Date: Fri, 19 May 2023 21:30:21 +0100 (BST)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Subject: Re: [PATCH 2/3] MIPS: Introduce config options for LLSC
availability
On Fri, 19 May 2023, Jiaxun Yang wrote:
> --- a/arch/mips/include/asm/cpu-features.h
> +++ b/arch/mips/include/asm/cpu-features.h
> @@ -185,8 +185,13 @@
> #ifndef cpu_has_ejtag
> #define cpu_has_ejtag __opt(MIPS_CPU_EJTAG)
> #endif
> +
> #ifndef cpu_has_llsc
> -#define cpu_has_llsc __isa_ge_or_opt(1, MIPS_CPU_LLSC)
> +# ifdef CONFIG_CPU_MAY_HAVE_LLSC
> +# define cpu_has_llsc (IS_ENABLED(CONFIG_CPU_HAS_LLSC) || __opt(MIPS_CPU_LLSC))
Extraneous space and overlong line here.
Maciej
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