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Message-ID: <d97a5b51-f71e-28d6-47ee-a49d11a6aa2d@linaro.org>
Date: Sat, 20 May 2023 01:01:58 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Abhinav Kumar <quic_abhinavk@...cinc.com>,
Rob Clark <robdclark@...il.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Kalyan Thota <quic_kalyant@...cinc.com>,
Shubhashree Dhar <dhar@...eaurora.org>,
Raviteja Tamatam <travitej@...eaurora.org>,
Krishna Manikandan <quic_mkrishn@...cinc.com>
Cc: Rob Clark <robdclark@...omium.org>, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
Marijn Suijten <marijn.suijten@...ainline.org>,
freedreno@...ts.freedesktop.org
Subject: Re: [PATCH v2] drm/msm/dpu: Set DPU_DATA_HCTL_EN for in
INTF_SC7180_MASK
On 20.05.2023 00:00, Abhinav Kumar wrote:
>
>
> On 5/19/2023 11:49 AM, Konrad Dybcio wrote:
>> DPU5 and newer targets enable this unconditionally. Move it from the
>> SC7280 mask to the SC7180 one.
>>
>
> You mean DPU 5.0.0 right?
Yep!
>
>> Fixes: 7e6ee55320f0 ("drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target")
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>> Reviewed-by: Marijn Suijten <marijn.suijten@...ainline.org>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
>> ---
>
> I have cross-checked all the chipsets affected by this and confirmed DATA_HCTL is present and those 3 registers programmed with that feature bit are valid, hence
>
> Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
Thanks!
Konrad
>
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