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Date:   Sat, 20 May 2023 16:17:53 +0100
From:   Jonathan Cameron <jic23@...nel.org>
To:     Conor Dooley <conor@...nel.org>
Cc:     marius.cristea@...rochip.com, lars@...afoo.de, robh+dt@...nel.org,
        linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: adding MCP3564 ADC

On Fri, 19 May 2023 19:29:15 +0100
Conor Dooley <conor@...nel.org> wrote:

> Hey Marius,
> 
> On Fri, May 19, 2023 at 07:01:44PM +0300, marius.cristea@...rochip.com wrote:
> > From: Marius Cristea <marius.cristea@...rochip.com>
> > 
> > This is the device tree schema for iio driver for
> > Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> > Delta-Sigma ADCs with an SPI interface.  
> 
> Just one quick process bit, please try to CC all of the maintainers
> listed by get_maintainer.pl - you unfortunately managed to miss 2 of the
> 3 dt-binding maintainers :/ Perhaps you ran get_maintainer.pl using our
> vendor tree?
> 
> > Signed-off-by: Marius Cristea <marius.cristea@...rochip.com>
> > ---  
> 
> > +  vref-supply:
> > +    description:
> > +      Some devices have a specific reference voltage supplied on a different
> > +      pin to the other supplies. Needed to be able to establish channel scaling
> > +      unless there is also an internal reference available (e.g. mcp3564r)  
> 
> Should this be marked as a required property for the non-r devices that
> do not have an internal reference?
> 
> > +  microchip,hw-device-address:  
> 
> Hopefully Rob or Jonathan etc can chime in as to whether a common
> property exists for this type of thing...
> 
Nope. This is a new one for me - there are devices that work on a daisy chain
principle but I think this one works by encoding stuff in the actual message
which is unusual for SPI.

> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    minimum: 0
> > +    maximum: 3
> > +    description:
> > +      The address is set on a per-device basis by fuses in the factory,
> > +      configured on request. If not requested, the fuses are set for 0x1.
> > +      The device address is part of the device markings to avoid
> > +      potential confusion. This address is coded on two bits, so four possible
> > +      addresses are available when multiple devices are present on the same
> > +      SPI bus with only one Chip Select line for all devices.  
> 
> ..although if it doesn't, it'd be good, I think, to add here where the
> property crops up in spi transfers. And if not in the description, in
> the commit message instead?
Agreed.  Top two bits of COMMAND BYTE which is first one on the wire I think.

Thanks,

J
> 
> Thanks,
> Conor.
> 

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