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Message-ID: <CAHp75VenNPOK7X=vOoZE2rGyC46q4qdNOgSDbDMqV+Gdigm81Q@mail.gmail.com>
Date:   Sun, 21 May 2023 11:53:19 +0300
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Jonathan Cameron <jic23@...nel.org>
Cc:     Старк Георгий Николаевич 
        <GNStark@...rdevices.ru>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        "lars@...afoo.de" <lars@...afoo.de>,
        "neil.armstrong@...aro.org" <neil.armstrong@...aro.org>,
        "khilman@...libre.com" <khilman@...libre.com>,
        "jbrunet@...libre.com" <jbrunet@...libre.com>,
        "nuno.sa@...log.com" <nuno.sa@...log.com>,
        "linux-iio@...r.kernel.org" <linux-iio@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-amlogic@...ts.infradead.org" 
        <linux-amlogic@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        kernel <kernel@...rdevices.ru>
Subject: Re: [PATCH v1] meson saradc: fix clock divider mask length

On Sat, May 20, 2023 at 6:30 PM Jonathan Cameron <jic23@...nel.org> wrote:
> On Wed, 17 May 2023 16:47:59 +0000
> Старк Георгий Николаевич <GNStark@...rdevices.ru> wrote:
> > On 5/16/23 22:08, Martin Blumenstingl wrote:

...

> > I've checked datasheets of all chips listed in meson_sar_adc_of_match array in meson_saradc.c and everywhere this field is 6 bits long. According to driver code and existing dts files this patch affects all supported chips except meson8.
>
> On that note, do we want to add any clarifying text on the scope to the
> commit message?

We should, I think, but according to Martin's message, as I may
interpret it, the datasheet may also be wrong and some experiments on
a real hardware should prepend any change in the code.


-- 
With Best Regards,
Andy Shevchenko

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