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Message-ID: <87lehikpu6.fsf@all.your.base.are.belong.to.us>
Date: Sun, 21 May 2023 11:15:29 +0200
From: Björn Töpel <bjorn@...nel.org>
To: David Hildenbrand <david@...hat.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
linux-riscv@...ts.infradead.org,
Anshuman Khandual <anshuman.khandual@....com>
Cc: Björn Töpel <bjorn@...osinc.com>,
linux-kernel@...r.kernel.org, linux-mm@...ck.org,
Oscar Salvador <osalvador@...e.de>,
virtualization@...ts.linux-foundation.org, linux@...osinc.com,
Alexandre Ghiti <alexghiti@...osinc.com>
Subject: Re: [PATCH 0/7] riscv: Memory Hot(Un)Plug support
Hi David and Anshuman!
Björn Töpel <bjorn@...nel.org> writes:
> David Hildenbrand <david@...hat.com> writes:
>
>> On 12.05.23 16:57, Björn Töpel wrote:
>>> From: Björn Töpel <bjorn@...osinc.com>
>>>
>>> Memory Hot(Un)Plug support for the RISC-V port
>>> ==============================================
>
> [...]
>
>>
>> Cool stuff! I'm fairly busy right now, so some high-level questions upfront:
>
> No worries, and no rush! I'd say the v1 series was mainly for the RISC-V
> folks, and I've got tons of (offline) comments from Alex -- and with
> your comments below some more details to figure out.
One of the major issues with my v1 patch is around init_mm page table
synchronization, and that'll be part of the v2.
I've noticed there's a quite a difference between x86-64 and arm64 in
terms of locking, when updating (add/remove) the init_mm table. x86-64
uses the usual page table locking mechanisms (used by the generic
kernel functions), whereas arm64 does not.
How does arm64 manage to mix the "lock-less" updates (READ/WRITE_ONCE,
and fences in set_p?d+friends), with the generic kernel ones that uses
the regular page locking mechanism?
I'm obviously missing something about the locking rules for memory hot
add/remove... I've been reading the arm64 memory hot add/remove
series, but none the wiser! ;-)
Björn
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