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Message-Id: <CSU52BU1D59A.1J8RKQA5FLAV3@suppilovahvero>
Date:   Wed, 24 May 2023 05:06:09 +0300
From:   "Jarkko Sakkinen" <jarkko@...nel.org>
To:     <shaopeijie@...tc.cn>, <pmenzel@...gen.mpg.de>
Cc:     <peterhuewe@....de>, <jgg@...pe.ca>,
        <linux-integrity@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] tpm_tis_spi: Release chip select when flow control
 fails

On Tue May 23, 2023 at 5:45 AM EEST,  wrote:
> From: Peijie Shao <shaopeijie@...tc.cn>
>
> The failure paths in tpm_tis_spi_transfer() do not deactivate
> chip select. Send an empty message (cs_select == 0) to overcome
> this.
>
> The patch is tested by two ways.
> One way needs to touch hardware:
>    1. force pull MISO pin down to GND, it emulates a forever
>       'WAIT' timing.
>    2. probe cs pin by an oscilloscope.
>    3. load tpm_tis_spi.ko.
> After loading, dmesg prints:
>     "probe of spi0.0 failed with error -110"
> and oscilloscope shows cs pin goes high(deactivated) after
> the failure. Before the patch, cs pin keeps low.
>
> Second way is by writing a fake spi controller.
>    1. implement .transfer_one method, fill all rx buf with 0.
>    2. implement .set_cs method, print the state of cs pin.
>    we can see cs goes high after the failure.
>
> Signed-off-by: Peijie Shao <shaopeijie@...tc.cn>

Looks good to me + great explanation, thank you.

Reviewed-by: Jarkko Sakkinen <jarkko@...nel.org>

BR, Jarkko

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