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Message-ID: <20230525-unwarlike-mule-f37ec29cf7c5@spud>
Date:   Thu, 25 May 2023 22:42:45 +0100
From:   Conor Dooley <conor@...nel.org>
To:     Xingyu Wu <xingyu.wu@...rfivetech.com>
Cc:     linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Emil Renner Berthing <kernel@...il.dk>,
        Rob Herring <robh+dt@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Hal Feng <hal.feng@...rfivetech.com>,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v6 09/11] riscv: dts: starfive: jh7110: add pmu
 controller node

On Thu, May 18, 2023 at 06:12:32PM +0800, Xingyu Wu wrote:
> From: Walker Chen <walker.chen@...rfivetech.com>
> 
> Add the pmu controller node for the Starfive JH7110 SoC. The PMU needs
> to be used by other modules such as VPU, ISP, etc.
> 
> Signed-off-by: Walker Chen <walker.chen@...rfivetech.com>

Firstly, this is missing your SoB - but more importantly this is already
in my tree as 6a887bcc4138 ("riscv: dts: starfive: Add PMU controller
node").

Thanks,
Conor.

> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 4c5fdb905da8..30e1f34d5cf8 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -496,5 +496,12 @@ aongpio: pinctrl@...20000 {
>  			gpio-controller;
>  			#gpio-cells = <2>;
>  		};
> +
> +		pwrc: power-controller@...30000 {
> +			compatible = "starfive,jh7110-pmu";
> +			reg = <0x0 0x17030000 0x0 0x10000>;
> +			interrupts = <111>;
> +			#power-domain-cells = <1>;
> +		};
>  	};
>  };
> -- 
> 2.25.1
> 

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