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Message-ID: <20230525125602.640855-2-claudiu.beznea@microchip.com>
Date:   Thu, 25 May 2023 15:55:58 +0300
From:   Claudiu Beznea <claudiu.beznea@...rochip.com>
To:     <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <nicolas.ferre@...rochip.com>,
        <alexandre.belloni@...tlin.com>, <daniel.lezcano@...aro.org>,
        <tglx@...utronix.de>, <wim@...ux-watchdog.org>,
        <linux@...ck-us.net>, <sebastian.reichel@...labora.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-watchdog@...r.kernel.org>,
        "Claudiu Beznea" <claudiu.beznea@...rochip.com>
Subject: [PATCH 1/5] dt-bindings: timer: atmel,at91sam9260-pit: convert to yaml

Convert Atmel PIT to YAML. Along with it clock binding has been added as
the driver enables it to ensure proper hardware functionality.

Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
---
 .../devicetree/bindings/arm/atmel-sysregs.txt |  6 ---
 .../bindings/timer/atmel,at91sam9260-pit.yaml | 51 +++++++++++++++++++
 2 files changed, 51 insertions(+), 6 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml

diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 67a66bf74895..7024839c5da2 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -4,12 +4,6 @@ Chipid required properties:
 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
 - reg : Should contain registers location and length
 
-PIT Timer required properties:
-- compatible: Should be "atmel,at91sam9260-pit"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the PIT which is the IRQ line
-  shared across all System Controller members.
-
 PIT64B Timer required properties:
 - compatible: Should be "microchip,sam9x60-pit64b"
 - reg: Should contain registers location and length
diff --git a/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
new file mode 100644
index 000000000000..f304cd68acd5
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/atmel,at91sam9260-pit.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Periodic Interval Timer (PIT)
+
+maintainers:
+  - Claudiu Beznea <claudiu.beznea@...rochip.com>
+
+description:
+  Atmel periodic interval timer provides the operating system’s scheduler
+  interrupt. It is designed to offer maximum accuracy and efficient management,
+  even for systems with long response time.
+
+properties:
+  compatible:
+    const: atmel,at91sam9260-pit
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    description:
+      Contain interrupt for the PIT which is the IRQ line shared across all
+      System Controller members.
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/at91.h>
+
+    pit: timer@...ffe40 {
+        compatible = "atmel,at91sam9260-pit";
+        reg = <0xfffffe40 0x10>;
+        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+        clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+    };
+...
-- 
2.34.1

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