lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 25 May 2023 22:22:02 +0530
From:   Jagadeesh Kona <quic_jkona@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
CC:     Bjorn Andersson <andersson@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Taniya Das <quic_tdas@...cinc.com>,
        "Satya Priya Kakitapalli" <quic_skakitap@...cinc.com>,
        <quic_imrashai@...cinc.com>, <quic_ajipan@...cinc.com>
Subject: Re: [PATCH 4/4] arm64: dts: qcom: sm8550: Add camera clock controller

Hi Konrad,

Thanks for your review!

On 5/19/2023 10:22 PM, Konrad Dybcio wrote:
> 
> 
> On 19.05.2023 17:56, Jagadeesh Kona wrote:
>> Add device node for camera clock controller on Qualcomm
>> SM8550 platform.
>>
>> Signed-off-by: Jagadeesh Kona <quic_jkona@...cinc.com>
>> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8550.dtsi | 15 +++++++++++++++
>>   1 file changed, 15 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
>> index e67e7c69dae6..ac82d3774ed8 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
>> @@ -4,6 +4,7 @@
>>    */
>>   
>>   #include <dt-bindings/clock/qcom,rpmh.h>
>> +#include <dt-bindings/clock/qcom,sm8550-camcc.h>
>>   #include <dt-bindings/clock/qcom,sm8550-gcc.h>
>>   #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
>>   #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
>> @@ -2397,6 +2398,20 @@ opp-202000000 {
>>   			};
>>   		};
>>   
>> +		camcc: clock-controller@...0000 {
>> +			compatible = "qcom,sm8550-camcc";
>> +			reg = <0 0xade0000 0 0x20000>;
> Please pad the non-zero address part to 8 hex digits
> 
Will take care of this in next series.

> Konrad
>> +			clocks = <&bi_tcxo_div2>,
>> +				 <&bi_tcxo_ao_div2>,
>> +				 <&sleep_clk>,
>> +				 <&gcc GCC_CAMERA_AHB_CLK>;
>> +			power-domains = <&rpmhpd SM8550_MMCX>;
>> +			required-opps = <&rpmhpd_opp_low_svs>;
>> +			#clock-cells = <1>;
>> +			#reset-cells = <1>;
>> +			#power-domain-cells = <1>;
>> +		};
>> +
>>   		mdss: display-subsystem@...0000 {
>>   			compatible = "qcom,sm8550-mdss";
>>   			reg = <0 0x0ae00000 0 0x1000>;

Thanks & Regards,
Jagadeesh

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ