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Message-ID: <CAGXv+5GyLeVBAk_DXJoTxoG400mnq4y6pa1JXRD7Svc4rtMQBg@mail.gmail.com>
Date:   Tue, 30 May 2023 15:29:40 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     Matthias Brugger <matthias.bgg@...il.com>
Cc:     Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
        Nícolas F. R. A. Prado 
        <nfraprado@...labora.com>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Project_Global_Chrome_Upstream_Group@...iatek.com,
        angelogioacchino.delregno@...labora.com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v3] arm64: dts: mediatek: Add cpufreq nodes for MT8192

On Sat, Mar 18, 2023 at 3:55 AM Nícolas F. R. A. Prado
<nfraprado@...labora.com> wrote:
>
> On Fri, Mar 17, 2023 at 02:19:44PM +0800, Allen-KH Cheng wrote:
> > Add the cpufreq nodes for MT8192 SoC.
> >
> > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
>
> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
> Tested-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
>
> Tested on Asurada Spherion Chromebook as well. In particular, verified that
> applying this commit makes suspend/resume work. Before, it would hang during
> resume:
>
>         Enabling non-boot CPUs ...
>         Detected VIPT I-cache on CPU1
>         GICv3: CPU1: found redistributor 100 region 0:0x000000000c060000
>         CPU1: Booted secondary processor 0x0000000100 [0x412fd050]
>
> But with this commit applied the machine is able to proceed bringing up the
> secondary processors and complete resume.

Ping on this patch.

Tested-by: Chen-Yu Tsai <wenst@...omium.org>

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