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Message-ID: <bb490143-e04c-495d-7519-323b653b7351@starfivetech.com>
Date:   Wed, 31 May 2023 16:56:30 +0800
From:   Hal Feng <hal.feng@...rfivetech.com>
To:     Xingyu Wu <xingyu.wu@...rfivetech.com>,
        <linux-riscv@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Conor Dooley <conor@...nel.org>,
        Emil Renner Berthing <kernel@...il.dk>
CC:     Rob Herring <robh+dt@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        <linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>
Subject: Re: [PATCH v6 02/11] clk: starfive: Add StarFive JH7110
 System-Top-Group clock driver

On Thu, 18 May 2023 18:12:25 +0800, Xingyu Wu wrote:
> From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> 
> Add driver for the StarFive JH7110 System-Top-Group clock controller.
> 
> Co-developed-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
> Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> ---
>  drivers/clk/starfive/Kconfig                  |  11 ++
>  drivers/clk/starfive/Makefile                 |   1 +
>  .../clk/starfive/clk-starfive-jh7110-stg.c    | 173 ++++++++++++++++++
>  3 files changed, 185 insertions(+)
>  create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-stg.c
> 
> diff --git a/drivers/clk/starfive/Kconfig b/drivers/clk/starfive/Kconfig
> index 5d2333106f13..d252c03bfb81 100644
> --- a/drivers/clk/starfive/Kconfig
> +++ b/drivers/clk/starfive/Kconfig
> @@ -39,3 +39,14 @@ config CLK_STARFIVE_JH7110_AON
>  	help
>  	  Say yes here to support the always-on clock controller on the
>  	  StarFive JH7110 SoC.
> +
> +config CLK_STARFIVE_JH7110_STG
> +	tristate "StarFive JH7110 System-Top-Group clock support"
> +	depends on CLK_STARFIVE_JH7110_SYS
> +	select AUXILIARY_BUS
> +	select CLK_STARFIVE_JH71X0
> +	select RESET_STARFIVE_JH7110

Please drop the above three lines because these three options
are already selected by CLK_STARFIVE_JH7110_SYS. Ditto to for
the isp and vout clock drivers.

With that fixed,
Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>

Best regards,
Hal

> +	default m if ARCH_STARFIVE
> +	help
> +	  Say yes here to support the System-Top-Group clock controller
> +	  on the StarFive JH7110 SoC.

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