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Message-ID: <f53b5c21247c49db8be7071de36c773b@realtek.com>
Date: Fri, 2 Jun 2023 03:20:04 +0000
From: Stanley Chang[昌育德]
<stanley_chang@...ltek.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
CC: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Alan Stern <stern@...land.harvard.edu>,
Flavio Suligoi <f.suligoi@...m.it>,
Mathias Nyman <mathias.nyman@...ux.intel.com>,
Douglas Anderson <dianders@...omium.org>,
Matthias Kaehlcke <mka@...omium.org>,
Ray Chi <raychi@...gle.com>,
Michael Grzeschik <m.grzeschik@...gutronix.de>,
"linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>
Subject: RE: [PATCH v2 3/3] dt-bindings: phy: realtek: Add the doc about the Realtek SoC USB 2.0/3.0 PHY
Hi Krzysztof,
> >
> > Most of the properties are about the phy parameters.
> > Is the phy parameter data suitable to be placed in DTS?
> > I referenced other phy drivers.
> > These parameters should not be defined in dts.
> > I would move the parameters to the driver.
>
> If these can be in the driver, why would ever they be in DTS in the first place?
>
Our platforms have 3 xhci controllers which map to 3 different phy ports.
And the three phy ports use the same driver, but the parameters are different.
So I put the parameter settings in DTS, we have 3 usb-phy nodes representing 3 phy ports.
Also, some parameters have to be adjusted for different boards.
Therefore, it is more applicable in DTS than in driver.
> >>> + realtek,usb:
> >>> + description: The phandler of realtek dwc3 node
> >>
> >> "phandler"? Except obvious typo, drop "The phandler of" and describe
> >> what is it for.
> >
> > realtek,usb is a phandle of syscon used to control realtek dwc3 register.
>
> Then no, phy should not control dwc3.
OK I know it doesn't make sense.
We want to disable phy suspend from mac layer.
I will try other method.
> >
> >>> + $ref: /schemas/types.yaml#/definitions/phandle
> >>
> >> Anyway, it shouldn't be here. No, no.
> >
> > Can I use it for phandle of syscon?
>
> PHY getting phandle to block using this PHY? Looks wrong. Why would PHY
> need to poke IP block register?
>
OK. I know it doesn't make sense.
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