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Message-ID: <20230602070817.GI14287@atomide.com>
Date: Fri, 2 Jun 2023 10:08:17 +0300
From: Tony Lindgren <tony@...mide.com>
To: Nishanth Menon <nm@...com>
Cc: Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Tero Kristo <kristo@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>,
Udit Kumar <u-kumar1@...com>, Nitin Yadav <n-yadav@...com>,
Neha Malcom Francis <n-francis@...com>
Subject: Re: [PATCH 2/6] arm64: dts: ti: k3-j721e: Configure pinctrl for
timer IO
* Nishanth Menon <nm@...com> [230531 21:32]:
> There are timer IO pads in the MCU domain, and in the MAIN domain. These
> pads can be muxed for the related timers.
>
> There are timer IO control registers for input and output. The registers
> for CTRLMMR_TIMER*_CTRL and CTRLMMR_MCU_TIMER*_CTRL are used to control
> the input. The registers for CTCTRLMMR_TIMERIO*_CTRL and
> CTRLMMR_MCU_TIMERIO*_CTRL the output.
>
> The multiplexing is documented in Technical Reference Manual[1] under
> "Timer IO Muxing Control Registers" and "Timer IO Muxing Control
> Registers", and the "Timers Overview" chapters.
>
> We do not expose the cascade_en bit due to the racy usage of
> independent 32 bit registers in-line with the timer instantiation in
> the device tree. The MCU timer controls are also marked as reserved for
> usage by the MCU firmware.
Reviewed-by: Tony Lindgren <tony@...mide.com>
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