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Message-ID: <ce2737b7-a2fa-b4f2-16f2-09971d5877fb@baylibre.com>
Date:   Wed, 7 Jun 2023 13:08:30 +0200
From:   Alexandre Mergnat <amergnat@...libre.com>
To:     Wenbin Mei <wenbin.mei@...iatek.com>,
        Ulf Hansson <ulf.hansson@...aro.org>
Cc:     Chaotian Jing <chaotian.jing@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Ritesh Harjani <riteshh@...eaurora.org>,
        Asutosh Das <asutoshd@...eaurora.org>,
        linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        kernel test robot <lkp@...el.com>
Subject: Re: [PATCH v5 1/1] mmc: mtk-sd: reduce CIT for better performance

On 06/06/2023 13:32, Wenbin Mei wrote:
> CQHCI_SSC1 indicates to CQE the polling period to use when using periodic
> SEND_QUEUE_STATUS(CMD13) polling.
> Since MSDC CQE uses msdc_hclk as ITCFVAL, so driver should use hclk
> frequency to get the actual time.
> The default value 0x1000 that corresponds to 150us for MediaTek SoCs, let's
> decrease it to 0x40 that corresponds to 2.35us, which can improve the
> performance of some eMMC devices.

Reviewed-by: Alexandre Mergnat <amergnat@...libre.com>

-- 
Regards,
Alexandre

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