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Message-ID: <64e9b4f15353d9733896b2a43e411144789f7c37.camel@mediatek.com>
Date: Thu, 8 Jun 2023 03:07:30 +0000
From: Shawn Sung (宋孝謙)
<Shawn.Sung@...iatek.com>
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Subject: Re: [PATCH v1 2/6] dt-bindings: reset: mt8188: Add reset control bits
for VDOSYS1
Hi Krzysztof,
Got it, I'll squash this commit with the one adds compatible, and
commit another patch to modify mmsys reset control to handle the new
rule of indexing.
Thanks,
Hsiao Chien Sung
On Wed, 2023-06-07 at 09:27 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>
> On 07/06/2023 08:11, Hsiao Chien Sung wrote:
> > Add reset control bits for MT8188 VDOSYS1.
>
> Double space -> one space.
>
> >
> > Signed-off-by: Hsiao Chien Sung <shawn.sung@...iatek.com>
> > ---
> > include/dt-bindings/reset/mt8188-resets.h | 12 ++++++++++++
>
> This should be squashed with patch adding compatible.
>
>
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/include/dt-bindings/reset/mt8188-resets.h
> b/include/dt-bindings/reset/mt8188-resets.h
> > index 377cdfda82a9..439a9a25ca19 100644
> > --- a/include/dt-bindings/reset/mt8188-resets.h
> > +++ b/include/dt-bindings/reset/mt8188-resets.h
> > @@ -33,4 +33,16 @@
> >
> > #define MT8188_TOPRGU_SW_RST_NUM 24
> >
> > +/* VDOSYS1 */
> > +#define MT8188_VDO1_RST_MERGE0_DL_ASYNC 9
>
> Indices start from 0.
>
> > +#define MT8188_VDO1_RST_MERGE1_DL_ASYNC 10
> > +#define MT8188_VDO1_RST_MERGE2_DL_ASYNC 11
> > +#define MT8188_VDO1_RST_MERGE3_DL_ASYNC 32
>
> ... and are continuous.
>
> Commit explains here nothing that it is for existing reset, so you
> got
> such review.
>
> Best regards,
> Krzysztof
>
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