linux-kernel - [PATCH v1 1/4] pinctrl: intel: optimize set

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Message-Id: <20230608070017.28072-2-raag.jadav@intel.com>
Date:   Thu,  8 Jun 2023 12:30:14 +0530
From:   Raag Jadav <raag.jadav@...el.com>
To:     linus.walleij@...aro.org, mika.westerberg@...ux.intel.com,
        andriy.shevchenko@...ux.intel.com
Cc:     linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        mallikarjunappa.sangannavar@...el.com, pandith.n@...el.com,
        Raag Jadav <raag.jadav@...el.com>
Subject: [PATCH v1 1/4] pinctrl: intel: optimize set_mux hook

Utilize a temporary variable for common shift operation
inside ->set_mux() hook and save a few bytes.

add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-3 (-3)
Function                                     old     new   delta
intel_pinmux_set_mux                         245     242      -3
Total: Before=10472, After=10469, chg -0.03%

Signed-off-by: Raag Jadav <raag.jadav@...el.com>
---
 drivers/pinctrl/intel/pinctrl-intel.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index c7a71c49df0a..e8adf2580321 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -411,18 +411,19 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev,
 	/* Now enable the mux setting for each pin in the group */
 	for (i = 0; i < grp->grp.npins; i++) {
 		void __iomem *padcfg0;
-		u32 value;
+		u32 value, pmode;
 
 		padcfg0 = intel_get_padcfg(pctrl, grp->grp.pins[i], PADCFG0);
-		value = readl(padcfg0);
 
+		value = readl(padcfg0);
 		value &= ~PADCFG0_PMODE_MASK;
 
 		if (grp->modes)
-			value |= grp->modes[i] << PADCFG0_PMODE_SHIFT;
+			pmode = grp->modes[i];
 		else
-			value |= grp->mode << PADCFG0_PMODE_SHIFT;
+			pmode = grp->mode;
 
+		value |= pmode << PADCFG0_PMODE_SHIFT;
 		writel(value, padcfg0);
 	}
 
-- 
2.17.1