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Message-ID: <CAGXv+5HnrYtMimwddNwf0723N_ihiQ_+WA=yCNWnxEneXwCo1Q@mail.gmail.com>
Date: Fri, 9 Jun 2023 14:51:59 +0800
From: Chen-Yu Tsai <wenst@...omium.org>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
Cc: Matthias Brugger <matthias.bgg@...il.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>
Subject: Re: [PATCH 2/4] arm64: dts: mediatek: mt8186: Wire up CPU
frequency/voltage scaling
On Thu, Jun 8, 2023 at 10:19 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com> wrote:
>
> Il 07/06/23 11:06, Chen-Yu Tsai ha scritto:
> > This adds clocks, dynamic power coefficients, and OPP tables for the CPU
> > cores, so that everything required at the SoC level for CPU freqency and
> > voltage scaling is available.
> >
> > Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
> > ---
> > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 274 +++++++++++++++++++++++
> > 1 file changed, 274 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> > index 1b754f7a0725..6735c1feb26d 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> > @@ -136,6 +136,240 @@ cci_opp_15: opp-1400000000 {
> > };
> > };
> >
> > + cluster0_opp: opp-table-cluster0 {
> > + compatible = "operating-points-v2";
> > + opp-shared;
> > +
> > + opp-500000000 {
> > + opp-hz = /bits/ 64 <500000000>;
> > + opp-microvolt = <600000>;
> > + opp-level = <15>;
>
> As far as I remember we don't need opp-level, can you please recheck that
> and in case remove the levels from all OPPs?
Looks like we don't need it for any of the DVFS stuff. I'll remove it from
all the OPP tables in all the patches.
ChenYu
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