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Message-ID: <10daa0d3-951a-72b8-f8f4-48defbc42586@collabora.com>
Date:   Thu, 8 Jun 2023 16:19:05 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Chen-Yu Tsai <wenst@...omium.org>,
        Matthias Brugger <matthias.bgg@...il.com>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
Subject: Re: [PATCH 3/4] arm64: dts: mediatek: mt8186: Add GPU speed bin NVMEM
 cells

Il 07/06/23 11:06, Chen-Yu Tsai ha scritto:
> On the MT8186, the chip is binned for different GPU voltages at the
> highest OPPs. The binning value is stored in the efuse.
> 
> Add the NVMEM cell, and tie it to the GPU.
> 
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>


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