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Message-Id: <e4baf6039368f52e5a5453982ddcb9a330fc689e.1686412569.git.christophe.jaillet@wanadoo.fr>
Date: Sat, 10 Jun 2023 17:59:25 +0200
From: Christophe JAILLET <christophe.jaillet@...adoo.fr>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>,
Thomas Abraham <thomas.abraham@...aro.org>,
Kukjin Kim <kgene.kim@...sung.com>
Cc: linux-kernel@...r.kernel.org, kernel-janitors@...r.kernel.org,
Christophe JAILLET <christophe.jaillet@...adoo.fr>,
stable@...r.kernel.org, Andi Shyti <andi.shyti@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-serial@...r.kernel.org
Subject: [PATCH v2 1/3] tty: serial: samsung_tty: Fix a memory leak in s3c24xx_serial_getclk() in case of error
If clk_get_rate() fails, the clk that has just been allocated needs to be
freed.
Cc: <stable@...r.kernel.org> # v3.3+
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Reviewed-by: Andi Shyti <andi.shyti@...nel.org>
Fixes: 5f5a7a5578c5 ("serial: samsung: switch to clkdev based clock lookup")
Signed-off-by: Christophe JAILLET <christophe.jaillet@...adoo.fr>
---
v2: Add an error message [Andi Shyti]
Add Cc: stable [Andi Shyti]
Add R-b tags
v1: https://lore.kernel.org/all/e4359d5ef206f5b349c1d15a515a1205e78dda55.1686285892.git.christophe.jaillet@wanadoo.fr/
Slightly unsure if Krzysztof's R-b should be kept or not.
v2 is not the same as v1, but the change looks small.
Sorry if I did wrong.
---
drivers/tty/serial/samsung_tty.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index 2a7520ad3abd..a92a23e1964e 100644
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -1459,8 +1459,12 @@ static unsigned int s3c24xx_serial_getclk(struct s3c24xx_uart_port *ourport,
continue;
rate = clk_get_rate(clk);
- if (!rate)
+ if (!rate) {
+ dev_err(ourport->port.dev,
+ "Failed to get clock rate for %s.\n", clkname);
+ clk_put(clk);
continue;
+ }
if (ourport->info->has_divslot) {
unsigned long div = rate / req_baud;
--
2.34.1
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