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Message-ID: <0cddd5e8-3de1-1b6a-b4b8-6304e4c674cf@linaro.org>
Date: Thu, 15 Jun 2023 12:52:18 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Frank Li <Frank.Li@....com>, vkoul@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, dmaengine@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
peng.fan@....com, joy.zou@....com, shenwei.wang@....com,
imx@...ts.linux.dev
Subject: Re: [PATCH v6 12/12] dt-bindings: fsl-dma: fsl-edma: add edma3
compatible string
On 14/06/2023 21:35, Frank Li wrote:
> Extend Freescale eDMA driver bindings to support eDMA3 IP blocks in
> i.MX8QM and i.MX8QXP SoCs. In i.MX93, both eDMA3 and eDMA4 are now.
>
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
> .../devicetree/bindings/dma/fsl,edma.yaml | 99 +++++++++++++++++--
> 1 file changed, 92 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> index 5fd8fc604261..de8c44bd8a89 100644
> --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> @@ -21,32 +21,41 @@ properties:
> - enum:
> - fsl,vf610-edma
> - fsl,imx7ulp-edma
> + - fsl,imx8qm-adma
> + - fsl,imx8qm-edma
> + - fsl,imx93-edma3
> + - fsl,imx93-edma4
> - items:
> - const: fsl,ls1028a-edma
> - const: fsl,vf610-edma
>
> reg:
> - minItems: 2
> + minItems: 1
> maxItems: 3
>
> interrupts:
> - minItems: 2
> - maxItems: 17
> + minItems: 1
> + maxItems: 64
>
> interrupt-names:
> - minItems: 2
> - maxItems: 17
> + minItems: 1
> + maxItems: 64
>
> "#dma-cells":
> - const: 2
> + enum:
> + - 2
> + - 3
>
> dma-channels:
> - const: 32
> + minItems: 1
> + maxItems: 64
>
> clocks:
> + minItems: 1
> maxItems: 2
>
> clock-names:
> + minItems: 1
> maxItems: 2
>
> big-endian:
> @@ -65,6 +74,38 @@ required:
>
> allOf:
> - $ref: dma-controller.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - fsl,imx8qm-adma
> + - fsl,imx8qm-edma
> + - fsl,imx93-edma3
> + - fsl,imx93-edma4
> + then:
> + properties:
> + "#dma-cells":
> + const: 3
> + # It is not necessary to write the interrupt name for each channel.
> + # instead, you can simply maintain the sequential IRQ numbers as
> + # defined for the DMA channels.
> + interrupt-names: false
> + clock-names:
items:
- const: dma
clocks:
maxItems: 1
You do not allow more than one clock, right?
> + const: dma
> + else:
You already have two ifs, so you should not have else here, but rather
make each if clause proper for your setup.
BTW, the amount of differences point to very complicated schema, so you
should think whether it makes sense to keep binding growing in the first
place.
> + properties:
> + reg:
> + minItems: 2
> + maxItems: 3
> + interrupts:
> + minItems: 2
> + maxItems: 17
missing clocks restriction to minItems: 2
> + "#dma-cells":
> + const: 2
> + dma-channels:
> + const: 32
> +
Best regards,
Krzysztof
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