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Message-ID: <ZIrx6lZfsYnM7TnQ@smile.fi.intel.com>
Date: Thu, 15 Jun 2023 14:11:38 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Rasmus Villemoes <linux@...musvillemoes.dk>
Cc: Alessandro Zummo <a.zummo@...ertech.it>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, linux-rtc@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 4/8] rtc: isl12022: add support for trip level DT
binding
On Thu, Jun 15, 2023 at 12:58:22PM +0200, Rasmus Villemoes wrote:
> Implement support for using the values given in the
> isil,battery-trip-levels-microvolt property to set appropriate values
> in the VB85TP/VB75TP bits in the PWR_VBAT register.
A few nit-picks below.
...
> +static void isl12022_set_trip_levels(struct device *dev)
> +{
> + struct regmap *regmap = dev_get_drvdata(dev);
> + u32 levels[2] = {0, 0};
A nit, 0, 0 is not needed, {} will do the job.
> + int ret, i, j, x[2];
> + u8 val, mask;
BUILD_BUG_ON(ARRAY_SIZE(x) != ARRAY_SIZE(levels)) ?
> + device_property_read_u32_array(dev, "isil,battery-trip-levels-microvolt",
> + levels, 2);
A nit, ARRAY_SIZE(levels) ?
> + for (i = 0; i < 2; i++) {
ARRAY_SIZE(x) ?
> + for (j = 0; j < ARRAY_SIZE(trip_levels[i]) - 1; j++) {
> + if (levels[i] <= trip_levels[i][j])
> + break;
> + }
> + x[i] = j;
> + }
> +
> + val = FIELD_PREP(ISL12022_REG_VB85_MASK, x[0]) |
> + FIELD_PREP(ISL12022_REG_VB75_MASK, x[1]);
> + mask = ISL12022_REG_VB85_MASK | ISL12022_REG_VB75_MASK;
> +
> + ret = regmap_update_bits(regmap, ISL12022_REG_PWR_VBAT, mask, val);
> + if (ret)
> + dev_warn(dev, "unable to set battery alarm levels: %d\n", ret);
> +}
--
With Best Regards,
Andy Shevchenko
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