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Date:   Fri, 16 Jun 2023 09:10:06 +0200
From:   Stephan Gerhold <stephan@...hold.net>
To:     Douglas Anderson <dianders@...omium.org>
Cc:     andersson@...nel.org,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        konrad.dybcio@...ainline.org, sumit.semwal@...aro.org,
        Will Deacon <will@...nel.org>, amit.pundir@...aro.org,
        Sibi Sankar <quic_sibis@...cinc.com>,
        linux-arm-msm@...r.kernel.org, Stephen Boyd <swboyd@...omium.org>,
        linux-arm-kernel@...ts.infradead.org,
        Andy Gross <agross@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Rob Clark <robdclark@...omium.org>,
        Rob Herring <robh+dt@...nel.org>,
        cros-qcom-dts-watchers@...omium.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sc7180: Mark SCM as dma-coherent for
 trogdor

On Thu, Jun 15, 2023 at 02:52:54PM -0700, Douglas Anderson wrote:
> Trogdor devices use firmware backed by TF-A instead of Qualcomm's
> normal TZ. On TF-A we end up mapping memory as cachable. Specifically,
> you can see in Trogdor's TF-A code [1] in qti_sip_mem_assign() that we
> call qti_mmap_add_dynamic_region() with MT_RO_DATA. This translates
> down to MT_MEMORY instead of MT_NON_CACHEABLE or MT_DEVICE.
>
> **Apparently Qualcomm's normal TZ implementation maps the memory as
> non-cachable.**

Are you sure about this? From the discussion in the chat the conclusion
was that we can check easily for TF-A, but we have absolutely no idea
what Qualcomm's firmware implementation does. It might be "broken" the
same way and we just have not noticed it yet.

I would perhaps just omit this sentence so we don't risk misleading
someone with information we're not sure about. :)

> 
> Let's add the "dma-coherent" attribute to the SCM for trogdor.
> 

What about sc7280? I guess they use largely the same TF-A firmware?

Thanks,
Stephan

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