lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b2553058-bd78-6d9f-dcd0-d1c086b4fc3b@linaro.org>
Date:   Fri, 16 Jun 2023 13:36:23 +0200
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Mohammad Rafi Shaik <quic_mohs@...cinc.com>,
        krzysztof.kozlowski+dt@...aro.org, swboyd@...omium.org,
        andersson@...nel.org, broonie@...nel.org, agross@...nel.org
Cc:     robh+dt@...nel.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        quic_rohkumar@...cinc.com, srinivas.kandagatla@...aro.org,
        dianders@...omium.org, judyhsiao@...omium.org,
        quic_visr@...cinc.com,
        Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: Re: [RESEND v6 8/8] arm64: dts: qcom: sc7280: Add qcom,adsp-pil-mode
 property in clock nodes

On 16.06.2023 12:35, Mohammad Rafi Shaik wrote:
> From: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
> 
> Add "qcom,adsp-pil-mode" property in clock nodes for herobrine
> crd revision 3 board specific device tree.
> This is to register clocks conditionally by differentiating ADSP
> based platforms and legacy path platforms.
> Also disable lpass_core clock, as it is creating conflict
> with ADSP clocks and it is not required for ADSP based platforms.
> 
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
> ---
>  .../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi    | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> index c02ca393378f..876a29178d46 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> @@ -197,6 +197,14 @@ q6prmcc: clock-controller {
>  	};
>  };
>  
> +&lpass_aon {
> +	qcom,adsp-pil-mode;
That's a whole bunch of hacky bindings that makes no sense..

What should have been done from the beginning is:

- all clocks should be registered inside the clock driver, unconditionally
  as far as .c code is concerned

- the regmap properties within should reflect the actual max register
  range within the hardware block

- device-tree should contain protected-clocks, which omits registering
  specified clks (I guess in the ADSP-less case you could probably even
  register all of them and it wouldn't hurt)


> +};
> +
> +&lpass_core {
> +	status = "disabled";
status = "reserved";

Konrad
> +};
> +
>  &lpass_rx_macro {
>  	/delete-property/ power-domains;
>  	/delete-property/ power-domain-names;
> @@ -239,3 +247,7 @@ &lpass_va_macro {
>  
>  	status = "okay";
>  };
> +
> +&lpasscc {
> +	qcom,adsp-pil-mode;
> +};

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ