linux-kernel - Re: [RESEND v6 7/8] arm64: dts: qcom: sc7280: Modify LPASS_MCC reg region size in the lpass

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Date:   Wed, 21 Jun 2023 11:29:51 +0530
From:   Mohammad Rafi Shaik <quic_mohs@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <swboyd@...omium.org>,
        <andersson@...nel.org>, <broonie@...nel.org>, <agross@...nel.org>
CC:     <robh+dt@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_rohkumar@...cinc.com>, <srinivas.kandagatla@...aro.org>,
        <dianders@...omium.org>, <judyhsiao@...omium.org>,
        <quic_visr@...cinc.com>,
        Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: Re: [RESEND v6 7/8] arm64: dts: qcom: sc7280: Modify LPASS_MCC reg
 region size in the lpass_tlmm node


On 6/16/2023 5:00 PM, Konrad Dybcio wrote:
> On 16.06.2023 12:35, Mohammad Rafi Shaik wrote:
>> From: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
>>
>> Modify LPASS_MCC register region size in "lpass_tlmm" node.
>> The pincntl driver requires access until slew-rate register region
>> and remaining register region related to the lpass_efuse register
>> is not required in pincntl driver as lpass_efuse register region is
>> required in adsp remoteproc driver.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
>> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
>> ---
> Fixes tag?
>
> Konrad
Thanks for comment,

okay, will add fixes tag.
>>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 36f9edabb9d7..ec38f2feb9bf 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -2509,7 +2509,7 @@ lpass_ag_noc: interconnect@...0000 {
>>   		lpass_tlmm: pinctrl@...0000 {
>>   			compatible = "qcom,sc7280-lpass-lpi-pinctrl";
>>   			reg = <0 0x033c0000 0x0 0x20000>,
>> -				<0 0x03550000 0x0 0x10000>;
>> +				<0 0x03550000 0x0 0xa100>;
>>   			qcom,adsp-bypass-mode;
>>   			gpio-controller;
>>   			#gpio-cells = <2>;