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Message-ID: <20230621125749.GGZJLzzUw0rA3goV1X@fat_crate.local>
Date: Wed, 21 Jun 2023 14:57:49 +0200
From: Borislav Petkov <bp@...en8.de>
To: Xi Ruoyao <xry111@...111.site>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org,
Thomas Gleixner <tglx@...utronix.de>
Subject: Re: A question about prefetchw detection in "x86/asm: Cleanup
prefetch primitives"
On Wed, Jun 21, 2023 at 08:04:39PM +0800, Xi Ruoyao wrote:
> Hmm, while it's true for AMD, the Intel SDM claims otherwise. It says
> prefetchw is only (really) supported with "Intel® Core™ M processor
> family; 5th Generation Intel® Core™ processor family, Intel Atom
> processor based on Silvermont microarchitecture" or later. On the
> earlier Intel CPUs supporting LM, the prefetchw instruction is treated
> as NOP.
And this is a problem because?
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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