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Message-ID: <b50735128c5a985634468d63fef092f093f0aebc.camel@xry111.site>
Date: Wed, 21 Jun 2023 21:06:51 +0800
From: Xi Ruoyao <xry111@...111.site>
To: Borislav Petkov <bp@...en8.de>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org,
Thomas Gleixner <tglx@...utronix.de>
Subject: Re: A question about prefetchw detection in "x86/asm: Cleanup
prefetch primitives"
On Wed, 2023-06-21 at 14:57 +0200, Borislav Petkov wrote:
> On Wed, Jun 21, 2023 at 08:04:39PM +0800, Xi Ruoyao wrote:
> > Hmm, while it's true for AMD, the Intel SDM claims otherwise. It
> > says
> > prefetchw is only (really) supported with "Intel® Core™ M processor
> > family; 5th Generation Intel® Core™ processor family, Intel Atom
> > processor based on Silvermont microarchitecture" or later. On the
> > earlier Intel CPUs supporting LM, the prefetchw instruction is
> > treated
> > as NOP.
>
> And this is a problem because?
I think it's not an issue in the kernel itself, but announcing
3dnowprefetch in /proc/cpuinfo for an old Intel CPU w/o real prefetchw
implementation seems problematic (to me).
>
--
Xi Ruoyao <xry111@...111.site>
School of Aerospace Science and Technology, Xidian University
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